ecos-v3_0-branch: packages/hal/powerpc/arch/current/src/vectors.S annotate

annotate packages/hal/powerpc/arch/current/src/vectors.S @ 2729:74dbf4c3f2e1 after-copyright-change-20090129

Update all copyright banners to reflect FSF ownership; fix and improve licence text.

author	jlarmour
date	Thu, 29 Jan 2009 17:47:46 +0000
parents	73921684f287
children

rev	line source
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	1 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	2 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	3 ## vectors.S
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	4 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	5 ## PowerPC exception vectors
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	6 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	7 ##==========================================================================
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	8 ## ####ECOSGPLCOPYRIGHTBEGIN####
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	9 ## -------------------------------------------
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	10 ## This file is part of eCos, the Embedded Configurable Operating System.
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	12 ##
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	13 ## eCos is free software; you can redistribute it and/or modify it under
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	14 ## the terms of the GNU General Public License as published by the Free
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	15 ## Software Foundation; either version 2 or (at your option) any later
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	16 ## version.
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	17 ##
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	18 ## eCos is distributed in the hope that it will be useful, but WITHOUT
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	19 ## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	20 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	21 ## for more details.
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	22 ##
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	23 ## You should have received a copy of the GNU General Public License
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	24 ## along with eCos; if not, write to the Free Software Foundation, Inc.,
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	25 ## 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	26 ##
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	27 ## As a special exception, if other files instantiate templates or use
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	28 ## macros or inline functions from this file, or you compile this file
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	29 ## and link it with other works to produce a work based on this file,
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	30 ## this file does not by itself cause the resulting work to be covered by
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	31 ## the GNU General Public License. However the source code for this file
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	32 ## must still be made available in accordance with section (3) of the GNU
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	33 ## General Public License v2.
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	34 ##
2729 74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	35 ## This exception does not invalidate any other reasons why a work based
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	36 ## on this file might be covered by the GNU General Public License.
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	37 ## -------------------------------------------
74dbf4c3f2e1 Update all copyright banners to reflect FSF ownership; fix and improve licence text. jlarmour parents: 2563 diff changeset	38 ## ####ECOSGPLCOPYRIGHTEND####
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	39 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	40 #######DESCRIPTIONBEGIN####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	41 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	42 ## Author(s): nickg, jskov
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	43 ## Contributors: nickg, jskov
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	44 ## Date: 1999-02-20
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	45 ## Purpose: PowerPC exception vectors
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	46 ## Description: This file defines the code placed into the exception
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	47 ## vectors. It also contains the first level default VSRs
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	48 ## that save and restore state for both exceptions and
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	49 ## interrupts.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	50 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	51 ######DESCRIPTIONEND####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	52 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	53 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	54
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	55 #===========================================================================
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	56 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	57 # The PowerPC exception handling has changed as of version 1.3.1.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	58 # The primary motivation for rewriting the code was to bring it more
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	59 # in line with the other HALs, in particular to allow a RAM application
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	60 # to cleanly take over only a subset of vectors from a running ROM
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	61 # monitor.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	62 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	63 # GDB stubs (and CygMon, should it be ported to PPC) copies
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	64 # exception vector entry handler code to address 0. These vector entry
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	65 # handlers (defined by the exception_vector macro below) compute
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	66 # a vector index into the hal_vsr_table, fetch the pointer, and
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	67 # jump to the HAL vector service routine (VSR).
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	68 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	69 # The hal_vsr_table is located immediately after the vector
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	70 # handlers (at address 0x3000), allowing RAM applications to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	71 # change VSRs as necessary, while still keeping desired ROM
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	72 # monitor functionality available for debugging.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	73 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	74 # ROM applications can still be configured to leave the vector entry
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	75 # handlers at 0xff000000, but there is at the moment no
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	76 # provision for reclaiming the reserved vector space in RAM to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	77 # application usage.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	78 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	79 # RAM applications can also be configured to provide exception
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	80 # handlers which are copied to address 0 on startup, thus taking
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	81 # full control of the target.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	82 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	83 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	84 # Default configuration is for RAM applications to rely on an
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	85 # existing ROM monitor to provide debugging functionality, and
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	86 # for ROM applications to copy vectors to address 0.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	87 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	88 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	89 # Unfortunately the new exception scheme is not compatible with the
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	90 # old scheme. Stubs and applications must be compiled using the same
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	91 # scheme (i.e., old binaries will not run with new stubs, and new
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	92 # binaries will not run with old stubs).
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	93 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	94 #===========================================================================
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	95
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	96 #include <pkgconf/hal.h>
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	97
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	98 #ifdef CYGPKG_KERNEL
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	99 #include <pkgconf/kernel.h> // CYGPKG_KERNEL_INSTRUMENT
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	100 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	101
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	102 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	103 #include <cyg/hal/ppc_regs.h>
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	104
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	105 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	106
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	107 // .file "vectors.S"
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	108
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	109 .extern hal_interrupt_data
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	110 .extern hal_interrupt_handlers
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	111 .extern hal_interrupt_objects
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	112 .extern hal_vsr_table
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	113
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	114 .extern cyg_hal_invoke_constructors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	115 .extern cyg_instrument
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	116 .extern cyg_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	117 .extern hal_IRQ_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	118 .extern hal_MMU_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	119 .extern hal_enable_caches
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	120 .extern hal_hardware_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	121 .extern initialize_stub
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	122
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	123 .extern __bss_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	124 .extern __bss_end
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	125 .extern __sbss_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	126 .extern __sbss_end
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	127
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	128 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	129 # MSR initialization value
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	130 # zero all bits except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	131 # FP = floating point available
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	132 # ME = machine check enabled
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	133 # IP = vectors at 0xFFFxxxxx (ROM startup only)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	134 # IR = instruction address translation
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	135 # DR = data address translation
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	136 # RI = recoverable interrupt
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	137
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	138 #define CYG_MSR_COMMON (MSR_FP \| MSR_ME \| MSR_RI)
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	139
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	140 #if (CYGHWR_HAL_POWERPC_VECTOR_BASE == 0xfff00000)
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	141 # define IP_BIT MSR_IP
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	142 #else
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	143 # define IP_BIT 0
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	144 #endif
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	145
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	146 #ifdef CYGHWR_HAL_POWERPC_ENABLE_MMU
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	147 # define IR_DR_BITS (MSR_IR \| MSR_DR)
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	148 #else
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	149 # define IR_DR_BITS 0
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	150 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	151
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	152 #define CYG_MSR (CYG_MSR_COMMON \| IP_BIT \| IR_DR_BITS)
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	153
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	154 # Include variant macros after MSR definition.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	155 #include <cyg/hal/arch.inc>
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	156 #include <cyg/hal/ppc_offsets.inc>
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	157
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	158
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	159 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	160 # If the following option is enabled, we only save registers up to R12.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	161 # The PowerPC ABI defines registers 13..31 as callee saved and thus we do
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	162 # not need to save them when calling C functions.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	163
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	164 #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	165 # define MAX_SAVE_REG 12
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	166 #else
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	167 # define MAX_SAVE_REG 31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	168 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	169
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	170
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	171 #if defined(CYGHWR_HAL_POWERPC_NEED_VECTORS)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	172
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	173 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	174 # Start by defining the exceptions vectors that must be placed at
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	175 # locations 0xFFF00000 or 0x00000000. The following code will normally
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	176 # be located at 0xFFF00000 in the ROM. It may optionally be copied out
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	177 # to 0x00000000 if we want to use the RAM vectors. For this reason this code
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	178 # MUST BE POSITION INDEPENDENT.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	179
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	180 .section ".vectors","ax"
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	181
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	182 #---------------------------------------------------------------------------
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	183 # Macros for generating an exception vector service routine
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	184
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	185 # Reset vector macro
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	186
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	187 .macro reset_vector name
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	188 .p2align 8
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	189 .globl __exception_\name
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	190 __exception_\name:
473 87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	191 #ifdef CYGSEM_HAL_POWERPC_RESET_USES_JUMP
87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	192 bl _start
87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	193 #else
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	194 lwi r3,_start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	195 mtlr r3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	196 blr
473 87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	197 #endif
87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	198
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	199 .endm
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	200
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	201 # Generic vector macro
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	202
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	203 .macro exception_vector name
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	204 .p2align 8
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	205 .globl __exception_\name
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	206 __exception_\name:
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	207 mtspr SPRG1,r3 # stash some work registers away
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	208 mtspr SPRG2,r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	209 mtspr SPRG3,r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	210 mfcr r4 # stash CR
138 289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	211 li r5,__exception_\name-rom_vectors # load low half of vector addr
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	212 srwi r5,r5,6 # shift right by 6
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	213 lwi r3,hal_vsr_table # table base
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	214 lwzx r3,r3,r5 # address of vsr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	215 mflr r5 # save link register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	216 mtlr r3 # put vsr address into it
138 289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	217 li r3,__exception_\name-rom_vectors # reload low half of vector addr
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	218 blr # go to common code
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	219 .endm
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	220
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	221 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	222 # Define the exception vectors.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	223
138 289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	224 // Some platforms won't let us put the vector code just where we want
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	225 // This macro introduces some lattitude in vector placement
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	226
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	227 #ifdef CYG_HAL_FUDGE_VECTOR_ALIGNMENT
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	228 hal_fudge_vector_alignment
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	229 #endif
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	230
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	231 rom_vectors:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	232 # These are the architecture defined vectors that
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	233 # are always present.
138 289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	234 #ifdef CYG_HAL_RESERVED_VECTOR_00000
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	235 hal_reserved_vector_00000
289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	236 #else
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	237 exception_vector reserved_00000
138 289bf90c6a9b Merge from eCos master repository on 2000-11-24-06:43:05-GMT jlarmour parents: 136 diff changeset	238 #endif
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	239 reset_vector reset
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	240 exception_vector machine_check
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	241 exception_vector data_storage
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	242 exception_vector instruction_storage
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	243 exception_vector external
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	244 exception_vector alignment
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	245 exception_vector program
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	246 exception_vector floatingpoint_unavailable
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	247 exception_vector decrementer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	248 exception_vector reserved_00a00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	249 exception_vector reserved_00b00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	250 exception_vector system_call
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	251 exception_vector trace
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	252 exception_vector floatingpoint_assist
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	253 exception_vector reserved_00f00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	254
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	255 # Variants may define extra vectors.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	256 hal_extra_vectors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	257
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	258 rom_vectors_end:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	259
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	260 #else // CYGHWR_HAL_POWERPC_NEED_VECTORS
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	261
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	262 # When vectors are not included this is the primary entry point.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	263 .globl __exception_reset
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	264 __exception_reset:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	265 lwi r3,_start
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	266 mtlr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	267 blr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	268
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	269 #endif // CYGHWR_HAL_POWERPC_NEED_VECTORS
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	270
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	271
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	272
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	273 #===========================================================================
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	274 # Real startup code. We jump here from the various reset vectors to set up
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	275 # the world.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	276
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	277 .text
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	278 .globl _start
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	279 _start:
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	280 # Initialize CPU to a post-reset state, ensuring the ground doesn''t
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	281 # shift under us while we try to set things up.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	282 hal_cpu_init
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	283
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	284 # Set up global offset table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	285 lwi r2,_GLOBAL_OFFSET_TABLE_
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	286
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	287 # set up time base register to zero
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	288 xor r3,r3,r3
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	289 mtspr TBL_W,r3
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	290 xor r4,r4,r4
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	291 mtspr TBU_W,r4
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	292
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	293 # Call platform specific hardware initialization
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	294 # This may include memory controller initialization. It is not
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	295 # safe to access RAM until after this point.
16 4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	296 bl hal_hardware_init # this is platform dependent
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	297 .globl _hal_hardware_init_done
1223 dbcfe4e0dbd2 New platform - TAMS MOAB - and generic changes to support it gthomas parents: 1157 diff changeset	298 _hal_hardware_init_done:
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	299
2563 73921684f287 Better control over installing/copying exception vectors - from Shaun Louie gthomas parents: 2438 diff changeset	300 #ifdef CYGSEM_HAL_POWERPC_COPY_VECTORS
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	301 lwi r3,rom_vectors-4
1431 3e87cf3554ba Minor change for new assembler gthomas parents: 1333 diff changeset	302 lwi r4,((CYGHWR_HAL_POWERPC_VECTOR_BASE)-4)
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	303 lwi r5,rom_vectors_end-4
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	304 sub r5,r5,r3 # compute number of words to copy
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	305 srwi r5,r5,2
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	306 mtctr r5
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	307 0: lwzu r0,4(r3)
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	308 stwu r0,4(r4)
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	309 bdnz 0b
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 149 diff changeset	310 #endif
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	311
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	312 # set up stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	313 lwi sp,__interrupt_stack
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	314 mtspr SPRG0,sp # save in sprg0 for later use
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	315
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	316 # Set up exception handlers and VSR table, taking care not to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	317 # step on any ROM monitor''s toes.
473 87f3e026b015 PPC60x improvements gthomas parents: 423 diff changeset	318 hal_mon_init
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	319
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	320 #if defined(CYG_HAL_STARTUP_ROM)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	321 # Copy data from ROM to ram
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	322 lwi r3,__rom_data_start # r3 = rom start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	323 lwi r4,__ram_data_start # r4 = ram start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	324 lwi r5,__ram_data_end # r5 = ram end
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	325
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	326 cmplw r4,r5 # skip if no data
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	327 beq 2f
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	328 sub r5,r5,r4 # compute number of words to copy
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	329 srwi r5,r5,2
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	330 mtctr r5
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	331 subi r3,r3,4
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	332 subi r4,r4,4
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	333 1: lwzu r0,4(r3) # get word from ROM
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	334 stwu r0,4(r4) # store in RAM
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	335 bdnz 1b
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	336 2:
14 01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST jlarmour parents: 10 diff changeset	337 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	338
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	339 # clear BSS
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	340 lwi r3,__bss_start # r3 = start
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	341 lwi r4,__bss_end # r4 = end
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	342 li r0,0 # r0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	343 cmplw r3,r4 # skip if no bss
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	344 beq 2f
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	345 sub r4,r4,r3 # compute number of words to clear
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	346 srwi r4,r4,2
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	347 mtctr r4
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	348 subi r3,r3,4
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	349
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	350 1: stwu r0,4(r3) # store zero & increment pointer
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	351 bdnz 1b
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	352 2:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	353
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	354 # clear SBSS
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	355 lwi r3,__sbss_start # r3 = start
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	356 lwi r4,__sbss_end # r4 = end
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	357 cmplw r3,r4 # skip if no sbss
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	358 beq 2f
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	359 sub r4,r4,r3 # compute number of words to clear
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	360 srwi r4,r4,2
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	361 mtctr r4
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	362 subi r3,r3,4
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	363
2438 8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	364 1: stwu r0,4(r3) # store zero & increment pointer
8317d1af06db Optimize system initialization gthomas parents: 1431 diff changeset	365 bdnz 1b
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	366 2:
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	367
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	368 # It is now safe to call C functions which may rely on initialized
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	369 # data.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	370
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	371 # Set up stack for calls to C code.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	372 subi sp,sp,12 # make space on stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	373 li r0,0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	374 stw r0,0(sp) # clear back chain
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	375 stw r0,8(sp) # zero return pc
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	376 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	377
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	378 # Variant HALs may need to do something special before we continue
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	379 bl hal_variant_init
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	380
101 c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	381 # Platform initialization
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	382 bl hal_platform_init
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	383
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	384 # MMU and cache are controlled by the same option since caching
1333 0e2485da1dbc Fix problem with [re]enable of FPU during interrupts gthomas parents: 1223 diff changeset	385 # on the PPC [typically] does not make sense without the MMU to mark
0e2485da1dbc Fix problem with [re]enable of FPU during interrupts gthomas parents: 1223 diff changeset	386 # regions which should not be cached.
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	387 #ifdef CYGHWR_HAL_POWERPC_ENABLE_MMU
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	388 # Initialize MMU.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	389 bl hal_MMU_init
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	390
1333 0e2485da1dbc Fix problem with [re]enable of FPU during interrupts gthomas parents: 1223 diff changeset	391 # Enable MMU (if desired) so we can safely enable caches.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	392 lwi r3,CYG_MSR # interrupts enabled later
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	393 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	394 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	395 sync
14 01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST jlarmour parents: 10 diff changeset	396
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	397 # Enable caches
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	398 bl hal_enable_caches
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	399 #endif // CYGHWR_HAL_POWERPC_ENABLE_MMU
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	400
149 52c99470ec11 Merge from eCos master repository on 2001-01-19-06:43:03-GMT jlarmour parents: 138 diff changeset	401 # set up platform specific interrupt environment
52c99470ec11 Merge from eCos master repository on 2001-01-19-06:43:03-GMT jlarmour parents: 138 diff changeset	402 bl hal_IRQ_init
52c99470ec11 Merge from eCos master repository on 2001-01-19-06:43:03-GMT jlarmour parents: 138 diff changeset	403
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	404 # call c++ constructors
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	405 bl cyg_hal_invoke_constructors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	406
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	407 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	408 bl initialize_stub
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	409 #endif
101 c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	410 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	411 \|\| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	412 .extern hal_ctrlc_isr_init
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	413 bl hal_ctrlc_isr_init
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	414 #endif
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	415
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	416 bl cyg_start # call cyg_start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	417 9:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	418 b 9b # if we return, loop
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	419
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	420 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	421 # This code handles the common part of all exception handlers.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	422 # It saves the machine state onto the stack and then calls
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	423 # a "C" routine to do the rest of the work. This work may result
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	424 # in thread switches, and changes to the saved state. When we return
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	425 # here the saved state is restored and execution is continued.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	426
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	427 .text
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	428
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	429 .globl cyg_hal_default_exception_vsr
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	430 cyg_hal_default_exception_vsr:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	431
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	432 # We come here with all register containing their
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	433 # pre-exception values except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	434 # R3 = ls 16 bits of vector address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	435 # R4 = saved CR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	436 # R5 = saved LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	437 # LR = VSR address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	438 # SPRG1 = old R3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	439 # SPRG2 = old R4
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	440 # SPRG3 = old R5
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	441 # SRR0 = old PC
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	442 # SRR1 = old MSR and the exception cause (the POW state is lost!)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	443
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	444 subi sp,sp,CYGARC_PPC_EXCEPTION_DECREMENT
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	445 # leave space for registers and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	446 # a safety margin
136 a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	447 #ifdef CYGPKG_HAL_POWERPC_PPC40x
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	448 // The caches on this processor are always enabled when the MMU is on
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	449 // (and disabled when off). Thus we need to be careful about cache
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	450 // polution and staleness when changing the MMU state.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	451 // At this point, the MMU is off due to the exception. We need to
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	452 // flush the part of the cache which may be touched before the MMU
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	453 // is reenabled so that memory will be consistent when that happens.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	454 // Of course, this is complicated by the fact that there are no "free"
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	455 // registers at this point in the code.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	456 dcbf 0,sp // Flushes first line
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	457 stw r3,0(sp) // This is now safe
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	458 li r3,CYGARC_PPCREG_VECTOR // Flush lines which will be changed
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	459 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	460 li r3,CYGARC_PPCREG_CR
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	461 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	462 li r3,CYGARC_PPCREG_LR
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	463 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	464 lwz r3,0(sp) // Restore register
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	465 #endif
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	466
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	467 # First, save away some registers
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	468 stw r3,CYGARC_PPCREG_VECTOR(sp) # stash vector
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	469 stw r4,CYGARC_PPCREG_CR(sp) # stash CR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	470 stw r5,CYGARC_PPCREG_LR(sp) # stash LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	471
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	472 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	473 # Mark this fram as an Exception frame
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	474 lwi r3,0xDDDDDDE0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	475 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	476 lwi r3,0xDDDDDDE1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	477 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	478 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	479
1333 0e2485da1dbc Fix problem with [re]enable of FPU during interrupts gthomas parents: 1223 diff changeset	480 # Enable MMU & interrupt/FPU environment (as configured)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	481 lwi r3,CYG_MSR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	482 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	483 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	484 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	485
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	486 mfspr r3,SPRG1 # save original R3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	487 stw r3,CYGARC_PPCREG_REGS+3*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	488 mfspr r4,SPRG2 # save original R4
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	489 stw r4,CYGARC_PPCREG_REGS+4*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	490 mfspr r5,SPRG3 # save original R5
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	491 stw r5,CYGARC_PPCREG_REGS+5*4(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	492
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	493 stw r0,CYGARC_PPCREG_REGS+0*4(sp) # save R0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	494 stw r2,CYGARC_PPCREG_REGS+2*4(sp) # save R2
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	495
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	496 mr r3,sp # recreate original SP
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	497 addi r3,r3,CYGARC_PPC_EXCEPTION_DECREMENT
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	498 stw r3,CYGARC_PPCREG_REGS+1*4(sp) # and save it in state
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	499
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	500 # Save registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	501 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	502 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	503 stw _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	504 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	505 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	506
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	507 # Save registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	508 stw r14,(CYGARC_PPCREG_REGS+14*4)(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	509 stw r15,(CYGARC_PPCREG_REGS+15*4)(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	510
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	511 # get remaining family CPU registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	512 mfxer r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	513 mfctr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	514 mfsrr0 r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	515 mfsrr1 r6
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	516 # and store them
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	517 stw r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	518 stw r4,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	519 stw r5,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	520 stw r6,CYGARC_PPCREG_MSR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	521
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	522 # Save variant registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	523 hal_variant_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	524
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	525 # Save FPU registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	526 hal_fpu_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	527
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	528 # The entire CPU state is now stashed on the stack,
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	529 # call into C to do something with it.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	530
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	531 mr r3,sp # R3 = register dump
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	532
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	533 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	534
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	535 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	536 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	537 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	538
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	539 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	540 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	541
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	542 lwi r5,restore_state # get return link
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	543 mtlr r5 # to link register
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	544
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	545 .extern cyg_hal_exception_handler
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	546 b cyg_hal_exception_handler # call C code, r3 = registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	547
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	548 # When the call returns it will go to restore_state below.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	549
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	550
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	551 ##--------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	552 ## The following macros are defined depending on whether the Interrupt
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	553 ## system is using isr tables or chaining, and depending on the interrupt
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	554 ## controller in the system.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	555
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	556 #ifndef CYGPKG_HAL_POWERPC_INTC_DEFINED
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	557
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	558 ## This is the simple version. No interrupt controller, CYGARC_PPCREG_VECTOR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	559 ## is updated with the decoded interrupt vector. Isr tables/chaining
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	560 ## use same interrupt decoder.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	561 ## Bit 21 biffers between decrementer (0) and external (1).
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	562
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	563 # decode the interrupt
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	564 .macro hal_intc_decode dreg,state
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	565 lwz \dreg,CYGARC_PPCREG_VECTOR(\state) # retrieve vector number,
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	566 rlwinm \dreg,\dreg,22,31,31 # isolate bit 21 and update
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	567 stw \dreg,CYGARC_PPCREG_VECTOR(\state) # vector in state frame.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	568 slwi \dreg,\dreg,2 # convert to word offset.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	569 .endm
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	570
72 da3908c9cd10 Merge from eCos master repository on 2000-02-17-18:56:14-GMT jlarmour parents: 70 diff changeset	571 #endif // CYGPKG_HAL_POWERPC_INTC_DEFINED
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	572
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	573 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	574 # Common interrupt handling code.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	575
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	576 .globl cyg_hal_default_interrupt_vsr
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	577 cyg_hal_default_interrupt_vsr:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	578
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	579 # We come here with all register containing their
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	580 # pre-exception values except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	581 # R3 = ls 16 bits of vector address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	582 # R4 = saved CR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	583 # R5 = saved LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	584 # LR = VSR address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	585 # SPRG1 = old R3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	586 # SPRG2 = old R4
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	587 # SPRG3 = old R5
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	588 # SRR0 = old PC
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	589 # SRR1 = old MSR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	590
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	591
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	592 subi sp,sp,CYGARC_PPC_EXCEPTION_DECREMENT
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	593 # leave space for registers and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	594 # a safety margin
136 a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	595 #ifdef CYGPKG_HAL_POWERPC_PPC40x
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	596 // The caches on this processor are always enabled when the MMU is on
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	597 // (and disabled when off). Thus we need to be careful about cache
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	598 // polution and staleness when changing the MMU state.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	599 // At this point, the MMU is off due to the exception. We need to
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	600 // flush the part of the cache which may be touched before the MMU
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	601 // is reenabled so that memory will be consistent when that happens.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	602 // Of course, this is complicated by the fact that there are no "free"
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	603 // registers at this point in the code.
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	604 dcbf 0,sp // Flushes first line
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	605 stw r3,0(sp) // This is now safe
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	606 li r3,CYGARC_PPCREG_VECTOR // Flush lines which will be changed
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	607 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	608 li r3,CYGARC_PPCREG_CR
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	609 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	610 li r3,CYGARC_PPCREG_LR
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	611 dcbf r3,sp
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	612 lwz r3,0(sp) // Restore register
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	613 #endif
a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 105 diff changeset	614
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	615 stw r3,CYGARC_PPCREG_VECTOR(sp) # stash vector
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	616 stw r4,CYGARC_PPCREG_CR(sp) # stash CR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	617 stw r5,CYGARC_PPCREG_LR(sp) # stash LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	618
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	619 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	620 # Mark this fram as an 1nterrupt frame
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	621 lwi r3,0xDDDDDD10
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	622 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	623 lwi r3,0xDDDDDD11
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	624 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	625 #endif
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	626
1333 0e2485da1dbc Fix problem with [re]enable of FPU during interrupts gthomas parents: 1223 diff changeset	627 # Enable MMU & interrupt/FPU environment as configured
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	628 lwi r3,CYG_MSR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	629 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	630 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	631 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	632
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	633 mfspr r3,SPRG1 # save original R3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	634 stw r3,CYGARC_PPCREG_REGS+3*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	635 mfspr r4,SPRG2 # save original R4
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	636 stw r4,CYGARC_PPCREG_REGS+4*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	637 mfspr r5,SPRG3 # save original R5
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	638 stw r5,CYGARC_PPCREG_REGS+5*4(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	639
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	640 stw r0,CYGARC_PPCREG_REGS+0*4(sp) # save R0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	641 stw r2,CYGARC_PPCREG_REGS+2*4(sp) # save R2
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	642
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	643 mr r3,sp # recreate original SP
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	644 addi r3,r3,CYGARC_PPC_EXCEPTION_DECREMENT
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	645 stw r3,CYGARC_PPCREG_REGS+1*4(sp) # and save it in state
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	646
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	647 # Save registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	648 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	649 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	650 stw _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	651 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	652 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	653
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	654 # Save registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	655 stw r14,CYGARC_PPCREG_REGS+14*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	656 stw r15,CYGARC_PPCREG_REGS+15*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	657
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	658 # get remaining family CPU registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	659 mfxer r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	660 mfctr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	661 mfsrr0 r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	662 mfsrr1 r6
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	663
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	664 # and store them
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	665 stw r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	666 stw r4,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	667 stw r5,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	668 stw r6,CYGARC_PPCREG_MSR(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	669
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	670 # Save variant registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	671 hal_variant_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	672
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	673 # Save FPU registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	674 hal_fpu_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	675
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	676 # The entire CPU state is now stashed on the stack,
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	677 # increment the scheduler lock and call the ISR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	678 # for this vector.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	679
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	680 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	681 .extern cyg_scheduler_sched_lock
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	682 lwi r3,cyg_scheduler_sched_lock
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	683 lwz r4,0(r3)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	684 addi r4,r4,1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	685 stw r4,0(r3)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	686 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	687
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	688 mr r14,sp # r14 = register dump
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	689
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	690 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	691 lwi r3,__interrupt_stack # stack top
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	692 lwi r4,__interrupt_stack_base # stack base
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	693 sub. r5,sp,r4 # sp - base
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	694 blt 1f # if < 0 - not on istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	695 sub. r5,r3,sp # top - sp
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	696 bgt 2f # if > 0 - already on istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	697
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	698 1: mr sp,r3 # switch to istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	699
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	700 2: stwu r14,-4(sp) # save old SP on stack
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	701
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	702 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	703
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	704 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	705
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	706 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	707 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	708 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	709
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	710 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	711 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	712
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	713 #if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	714
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	715 lwi r3,0x0301 # r3 = type = INTR,RAISE
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	716 lwz r4,CYGARC_PPCREG_VECTOR(r14) # arg1 = vector address
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	717 srwi r4,r4,8 # arg1 = vector number
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	718 xor r5,r5,r5 # arg2 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	719 bl cyg_instrument # call instrument function
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	720
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	721 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	722
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	723 hal_intc_decode r15,r14 # get table index
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	724
101 c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	725 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	726 \|\| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	727 # If we are supporting Ctrl-C interrupts from GDB, we must squirrel
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	728 # away a pointer to the save interrupt state here so that we can
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	729 # plant a breakpoint at some later time.
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	730
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	731 .extern hal_saved_interrupt_state
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	732 lwi r3,hal_saved_interrupt_state
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	733 stw r14,0(r3)
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	734
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	735 #endif
c37d3a9e1b28 Merge from eCos master repository on 2000-06-16-07:47:03-BST jlarmour parents: 82 diff changeset	736
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	737 #ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	738
68 f74b2666b30d Merge from eCos master repository on 2000-02-04-07:47:04-GMT jlarmour parents: 66 diff changeset	739 #ifdef CYGPKG_HAL_POWERPC_MPC8xx
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	740 # The CPM controller allows nested interrupts. However,
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	741 # it sits on the back of the SIU controller which has no
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	742 # HW support for this. In effect, SW masking of lower
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	743 # priority IRQs in the SIU would be required for this to work.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	744 #endif
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	745
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	746 #endif
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	747
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	748 lwz r3,CYGARC_PPCREG_VECTOR(r14) # retrieve decoded vector #
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	749
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	750 lwi r6,hal_interrupt_handlers # get interrupt handler table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	751 lwzx r6,r6,r15 # load routine pointer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	752
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	753 lwi r4,hal_interrupt_data # get interrupt data table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	754 lwzx r4,r4,r15 # load data pointer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	755 # R4 = data argument
423 d175f4be3ab6 Support for application profiling. gthomas parents: 210 diff changeset	756 mr r5,r14 # R5 = saved registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	757
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	758 mtctr r6 # put isr address in ctr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	759
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	760 bctrl # branch to ctr reg and link
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	761
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	762 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	763
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	764 # If we are returning from the last nested interrupt, move back
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	765 # to the thread stack. interrupt_end() must be called on the
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	766 # thread stack since it potentially causes a context switch.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	767 # Since we have arranged for the top of stack location to
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	768 # contain the sp we need to go back to here, just pop it off
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	769 # and put it in SP.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	770
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	771
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	772 lwz sp,CYGARC_PPC_STACK_FRAME_SIZE2(sp) # sp = sp
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	773
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	774 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	775
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	776 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	777 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	778 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	779
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	780 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	781 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	782 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	783
1157 aacbd943879a * src/vectors.S (cyg_hal_default_interrupt_vsr): Removed ifdef on nickg parents: 473 diff changeset	784 # On return r3 bit 1 will indicate whether a DSR is
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	785 # to be posted. Pass this together with a pointer to
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	786 # the interrupt object we have just used to the
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	787 # interrupt tidy up routine.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	788
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	789 # Note that r14 and r15 are defined to be preserved across
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	790 # calls by the calling convention, so they still contain
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	791 # the register dump and the vector number respectively.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	792
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	793 lwi r4,hal_interrupt_objects # get interrupt object table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	794 lwzx r4,r4,r15 # load object pointer
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	795 mr r5,r14 # arg3 = saved register dump
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	796
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	797 .extern interrupt_end
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	798 bl interrupt_end # call into C to finish off
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	799
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	800 restore_state:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	801 # All done, restore CPU state and continue
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	802
82 6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	803 # retrieve CPU state pointer
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	804 addi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE*2
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	805
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	806 # Restore FPU registers
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	807 hal_fpu_load sp
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	808
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	809 # Restore variant registers
6736c52df507 Merge from eCos master repository on 2000-04-14-13:35:46-BST jlarmour parents: 76 diff changeset	810 hal_variant_load sp
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	811
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	812 # get sprs we want to restore
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	813 # stuff some of them into the CPU
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	814 lwz r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	815 lwz r4,CYGARC_PPCREG_LR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	816 lwz r5,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	817 mtxer r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	818 mtlr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	819 mtctr r5
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	820
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	821 # Restore registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	822 lwz r14,CYGARC_PPCREG_REGS+14*4(r1)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	823 lwz r15,CYGARC_PPCREG_REGS+15*4(r1)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	824
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	825 # restore registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	826 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	827 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	828 lwz _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	829 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	830 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	831
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	832 hal_cpu_int_disable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	833
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	834 # restore R0 and R2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	835 lwz r0,CYGARC_PPCREG_REGS+0*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	836 lwz r2,CYGARC_PPCREG_REGS+2*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	837
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	838 # Here all the registers are loaded except
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	839 # sp = HAL_SavedRegisters
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	840 # r3 = ccr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	841 # r4 = srr0 = pc
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	842 # r5 = srr1 = msr
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	843 #
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	844 # We have to disable interrupts while srr0 and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	845 # srr1 are loaded, since another interrupt will
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	846 # destroy them.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	847
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	848 lwz r3,CYGARC_PPCREG_CR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	849 lwz r4,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	850 lwz r5,CYGARC_PPCREG_MSR(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	851 mtcr r3 # set ccr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	852 mtsrr0 r4 # load old pc
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	853 mtsrr1 r5 # load old msr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	854
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	855 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	856 # Mark this frame as (almost) dead.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	857 lwi r3,0xDDDDDDD0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	858 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	859 lwi r3,0xDDDDDDD1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	860 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	861 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	862
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	863 lwz r3,CYGARC_PPCREG_REGS+3*4(sp) # load r3 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	864 lwz r4,CYGARC_PPCREG_REGS+4*4(sp) # load r4 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	865 lwz r5,CYGARC_PPCREG_REGS+5*4(sp) # load r5 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	866 lwz sp,CYGARC_PPCREG_REGS+1*4(sp) # restore sp
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	867
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	868 sync # settle things down
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	869 isync
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	870 rfi # and return
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	871
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	872
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	873
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	874 ##-----------------------------------------------------------------------------
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	875 ## Execute pending DSRs on the interrupt stack with interrupts enabled.
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	876 ## Note: this can only be called from code running on a thread stack
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	877
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	878 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	879 .extern cyg_interrupt_call_pending_DSRs
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	880
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	881 FUNC_START(hal_interrupt_stack_call_pending_DSRs)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	882 # Change to interrupt stack, save state and set up stack for
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	883 # calls to C code.
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	884 mr r3,sp
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	885 lwi r4,__interrupt_stack
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	886 subi r4,r4,24 # make space on stack
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	887 mr sp,r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	888 stw r3,12(sp) # save old sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	889 mfmsr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	890 stw r3,16(sp) # save old MSR
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	891 mflr r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	892 stw r3,20(sp) # save old LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	893
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	894 li r0,0
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	895 stw r0,0(sp) # clear back chain
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	896 stw r0,8(sp) # zero return pc
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	897
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	898 hal_cpu_int_enable
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	899
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	900 # Call into kernel which will execute DSRs
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	901 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp)
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	902 bl cyg_interrupt_call_pending_DSRs
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	903 addi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	904
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	905 lwz r3,20(sp) # restore LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	906 mtlr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	907 lwz r5,12(sp) # get SP from saved state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	908 lwz r3,16(sp) # restore interrupt setting
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	909 hal_cpu_int_merge r3
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	910
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	911 mr sp,r5 # restore stack pointer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	912 blr # and return to caller
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	913 #endif
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	914
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	915 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	916 ## Temporary interrupt stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	917
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	918 .section ".bss"
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	919
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	920 .balign 16
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	921 .global cyg_interrupt_stack_base
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	922 cyg_interrupt_stack_base:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	923 __interrupt_stack_base:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	924 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	925 .byte 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	926 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	927 .balign 16
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	928 .global cyg_interrupt_stack
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	929 cyg_interrupt_stack:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	930 __interrupt_stack:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	931
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	932 .long 0,0,0,0,0,0,0,0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	933
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	934 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	935 # end of vectors.S

Mercurial > ecos-v3_0-branch

annotate packages/hal/powerpc/arch/current/src/vectors.S @ 2729:74dbf4c3f2e1 after-copyright-change-20090129