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annotate packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @ 208:e0c0827131d1 ecos

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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
parents dd81b18e45fb
children d2c90368aeef
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1 #ifndef CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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2 #define CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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3 //==========================================================================
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4 //
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5 // am29xxxxx_parts.inl
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6 //
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7 // AMD AM29xxxxx part descriptors
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8 //
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9 //==========================================================================
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10 //####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 //
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15 // eCos is free software; you can redistribute it and/or modify it under
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16 // the terms of the GNU General Public License as published by the Free
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17 // Software Foundation; either version 2 or (at your option) any later version.
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18 //
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19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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22 // for more details.
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23 //
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24 // You should have received a copy of the GNU General Public License along
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25 // with eCos; if not, write to the Free Software Foundation, Inc.,
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26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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27 //
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28 // As a special exception, if other files instantiate templates or use macros
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29 // or inline functions from this file, or you compile this file and link it
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30 // with other works to produce a work based on this file, this file does not
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31 // by itself cause the resulting work to be covered by the GNU General Public
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32 // License. However the source code for this file must still be made available
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33 // in accordance with section (3) of the GNU General Public License.
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34 //
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35 // This exception does not invalidate any other reasons why a work based on
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36 // this file might be covered by the GNU General Public License.
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37 //
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38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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39 // at http://sources.redhat.com/ecos/ecos-license
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40 // -------------------------------------------
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41 //####ECOSGPLCOPYRIGHTEND####
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42 //==========================================================================
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43 //#####DESCRIPTIONBEGIN####
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44 //
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45 // Author(s): jskov
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46 // Contributors: jskov, Koichi Nagashima
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47 // Date: 2001-06-08
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48 // Purpose:
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49 // Description: AMD AM29xxxxx part descriptors
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50 // Usage: Should be included from the flash_am29xxxxx.inl file only.
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51 //
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52 // FIXME: Add configury for selecting bottom/top bootblocks
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53 //####DESCRIPTIONEND####
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54 //
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55 //==========================================================================
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56
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57
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58 #if CYGNUM_FLASH_WIDTH == 8
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59 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F040B
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60 { // AM29F040B
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61 device_id : FLASHWORD(0xa4),
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62 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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63 block_count: 8,
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64 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
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65 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
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66 bootblock : false,
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67 banked : false
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68 },
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69 #endif
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70 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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71 { // MBM29LV160-T | AM29LV160-T
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72 device_id : FLASHWORD(0xc4),
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73 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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74 block_count: 32,
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75 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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76 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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77 bootblock : true,
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78 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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79 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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80 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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81 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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82 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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83 0
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84 },
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85 banked : false
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86 },
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87 { // MBM29LV160-B | AM29LV160-B
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88 device_id : FLASHWORD(0x49),
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89 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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90 block_count: 32,
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91 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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92 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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93 bootblock : true,
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94 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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95 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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96 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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97 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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98 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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99 0
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100 },
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101 banked : false
161
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102 },
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103 #endif
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104 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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105 { // AM29LV200-T
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106 device_id : FLASHWORD(0x3b),
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107 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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108 block_count: 4,
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109 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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110 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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111 bootblock : true,
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112 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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113 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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114 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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115 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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116 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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117 0
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118 },
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119 banked : false
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120 },
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121 { // AM29LV200-B
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122 device_id : FLASHWORD(0xbf),
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123 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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124 block_count: 4,
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125 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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126 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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127 bootblock : true,
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128 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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129 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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130 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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131 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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132 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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133 0
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134 },
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135 banked : false
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diff changeset
136 },
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137 #endif
161
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138 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
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139 { // AM29DL324D-T
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140 device_id : FLASHWORD(0x5c),
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141 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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142 block_count: 64,
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143 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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144 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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145 bootblock : true,
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146 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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147 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
148 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
149 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
150 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
151 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
152 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
153 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
154 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
155 0
174
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jlarmour
parents: 161
diff changeset
156 },
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jlarmour
parents: 161
diff changeset
157 banked : true,
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parents: 161
diff changeset
158 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 161
diff changeset
159 0
161
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jlarmour
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diff changeset
160 }
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jlarmour
parents:
diff changeset
161 },
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162 { // AM29DL324D-B
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163 device_id : FLASHWORD(0x5f),
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164 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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165 block_count: 64,
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166 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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167 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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168 bootblock : true,
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169 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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170 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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171 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
172 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
173 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
174 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
175 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
176 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
177 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
178 0
174
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jlarmour
parents: 161
diff changeset
179 },
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180 banked : true,
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181 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 161
diff changeset
182 0
161
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183 }
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184 },
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185 #endif
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186 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
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187 { // AM29F800-T
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188 device_id : FLASHWORD(0xd6),
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189 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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190 block_count: 16,
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191 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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192 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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193 bootblock : true,
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194 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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195 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
196 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
197 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
198 0x04000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
199 0
174
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jlarmour
parents: 161
diff changeset
200 },
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diff changeset
201 banked : false
161
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202 },
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203 { // AM29F800-B
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204 device_id : FLASHWORD(0x58),
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205 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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206 block_count: 16,
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207 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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208 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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209 bootblock : true,
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210 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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211 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
212 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
213 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
214 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
215 0
174
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jlarmour
parents: 161
diff changeset
216 },
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diff changeset
217 banked : false
161
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218 },
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219 #endif
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220 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
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221 { // AM29LV800-T
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222 device_id : FLASHWORD(0xda),
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223 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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224 block_count: 16,
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225 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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226 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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227 bootblock : true,
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228 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
229 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
230 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
231 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
232 0x04000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
233 0
174
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jlarmour
parents: 161
diff changeset
234 },
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diff changeset
235 banked : false
161
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diff changeset
236 },
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237 { // AM29LV800-B
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238 device_id : FLASHWORD(0x5b),
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239 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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240 block_count: 16,
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241 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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242 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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243 bootblock : true,
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244 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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245 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
246 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
247 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
248 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
249 0
174
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jlarmour
parents: 161
diff changeset
250 },
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parents: 161
diff changeset
251 banked : false
161
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252 },
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253 #endif
201
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diff changeset
254 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
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diff changeset
255 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
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diff changeset
256 device_id : FLASHWORD(0xCE),
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diff changeset
257 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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258 block_count: 16,
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diff changeset
259 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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260 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
261 bootblock : true,
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diff changeset
262 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
263 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
264 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
265 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
266 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
267 0
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jlarmour
parents: 195
diff changeset
268 },
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diff changeset
269 banked : false
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diff changeset
270 },
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diff changeset
271 #endif
161
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272
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273 #else // 16 bit devices
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274
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275 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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276 { // MBM29LV160-T | AM29LV160-T
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277 device_id : FLASHWORD(0x22c4),
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278 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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279 block_count: 32,
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280 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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281 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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282 bootblock : true,
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283 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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284 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
285 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
286 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
287 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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288 0
174
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parents: 161
diff changeset
289 },
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290 banked : false
161
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291 },
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292 { // MBM29LV160-B | AM29LV160-B
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293 device_id : FLASHWORD(0x2249),
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294 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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295 block_count: 32,
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296 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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297 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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298 bootblock : true,
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299 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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300 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
301 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
302 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
303 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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304 0
174
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diff changeset
305 },
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306 banked : false
161
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307 },
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308 #endif
208
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309 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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310 { // AM29LV200-T
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311 device_id : FLASHWORD(0x223b),
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312 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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313 block_count: 4,
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314 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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315 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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316 bootblock : true,
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317 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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318 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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319 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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320 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
321 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
322 0
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diff changeset
323 },
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324 banked : false
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325 },
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326 { // AM29LV200-B
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327 device_id : FLASHWORD(0x22bf),
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328 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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329 block_count: 4,
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330 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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331 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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332 bootblock : true,
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333 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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334 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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335 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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336 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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337 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
338 0
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339 },
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340 banked : false
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341 },
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342 #endif
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343 #ifdef CYGHWR_DEVS_FLASH_ST_M29W200B
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344 { // ST M29W200BT
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345 device_id : FLASHWORD(0x0051),
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346 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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347 block_count: 4,
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348 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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349 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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350 bootblock : true,
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351 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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352 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
353 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
354 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
355 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
356 0
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jlarmour
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diff changeset
357 },
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diff changeset
358 banked : false
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diff changeset
359 },
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diff changeset
360 { // ST M29W200BB
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361 device_id : FLASHWORD(0x0057),
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362 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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363 block_count: 4,
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364 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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365 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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366 bootblock : true,
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367 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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368 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
369 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
370 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
371 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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diff changeset
372 0
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jlarmour
parents: 201
diff changeset
373 },
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diff changeset
374 banked : false
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diff changeset
375 },
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376 #endif
161
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377 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
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378 { // AM29DL324D-T
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379 device_id : FLASHWORD(0x225c),
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380 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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381 block_count: 64,
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382 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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383 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
384 bootblock : true,
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diff changeset
385 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
386 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
387 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
388 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
389 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
390 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
391 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
392 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
393 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
394 0
174
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jlarmour
parents: 161
diff changeset
395 },
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jlarmour
parents: 161
diff changeset
396 banked : true,
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parents: 161
diff changeset
397 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 161
diff changeset
398 0
161
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jlarmour
parents:
diff changeset
399 }
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jlarmour
parents:
diff changeset
400 },
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jlarmour
parents:
diff changeset
401 { // AM29DL324D-B
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diff changeset
402 device_id : FLASHWORD(0x225f),
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diff changeset
403 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
404 block_count: 64,
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diff changeset
405 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
406 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
407 bootblock : true,
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jlarmour
parents:
diff changeset
408 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
409 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
410 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
411 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
412 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
413 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
414 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
415 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
416 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
417 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
418 },
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jlarmour
parents: 161
diff changeset
419 banked : true,
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jlarmour
parents: 161
diff changeset
420 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 161
diff changeset
421 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
422 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
423 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
424 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
425 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
426 { // AM29F800-T
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jlarmour
parents:
diff changeset
427 device_id : FLASHWORD(0x22d6),
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jlarmour
parents:
diff changeset
428 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
429 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
430 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
431 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
432 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
433 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
434 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
435 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
436 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
437 0x04000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
438 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
439 },
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jlarmour
parents: 161
diff changeset
440 banked : false
161
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jlarmour
parents:
diff changeset
441 },
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jlarmour
parents:
diff changeset
442 { // AM29F800-B
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jlarmour
parents:
diff changeset
443 device_id : FLASHWORD(0x2258),
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jlarmour
parents:
diff changeset
444 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
445 block_count: 16,
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jlarmour
parents:
diff changeset
446 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
447 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
448 bootblock : true,
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jlarmour
parents:
diff changeset
449 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
450 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
451 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
452 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
453 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
454 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
455 },
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jlarmour
parents: 161
diff changeset
456 banked : false
161
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jlarmour
parents:
diff changeset
457 },
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jlarmour
parents:
diff changeset
458 #endif
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jlarmour
parents:
diff changeset
459 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
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jlarmour
parents:
diff changeset
460 { // AM29LV800-T
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jlarmour
parents:
diff changeset
461 device_id : FLASHWORD(0x22da),
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jlarmour
parents:
diff changeset
462 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
463 block_count: 16,
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jlarmour
parents:
diff changeset
464 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
465 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
466 bootblock : true,
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jlarmour
parents:
diff changeset
467 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
468 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
469 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
470 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
471 0x04000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
472 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
473 },
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jlarmour
parents: 161
diff changeset
474 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
475 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
476 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
477 device_id : FLASHWORD(0x225b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
478 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
479 block_count: 16,
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jlarmour
parents:
diff changeset
480 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
481 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
482 bootblock : true,
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jlarmour
parents:
diff changeset
483 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
484 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
485 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
486 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
487 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
488 0
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
489 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
490 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
491 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
492 #endif
195
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jlarmour
parents: 174
diff changeset
493 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV640
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jlarmour
parents: 174
diff changeset
494 { // MBM29LV640xx
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jlarmour
parents: 174
diff changeset
495 device_id : FLASHWORD(0x22d7),
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jlarmour
parents: 174
diff changeset
496 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 174
diff changeset
497 block_count: 128,
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jlarmour
parents: 174
diff changeset
498 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 174
diff changeset
499 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 174
diff changeset
500 bootblock : false,
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jlarmour
parents: 174
diff changeset
501 banked : false
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
502 },
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
503 #endif
201
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jlarmour
parents: 195
diff changeset
504 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
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parents: 195
diff changeset
505 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
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jlarmour
parents: 195
diff changeset
506 device_id : FLASHWORD(0xCE),
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jlarmour
parents: 195
diff changeset
507 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
508 block_count: 16,
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jlarmour
parents: 195
diff changeset
509 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
510 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 195
diff changeset
511 bootblock : true,
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jlarmour
parents: 195
diff changeset
512 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
513 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
514 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
515 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
516 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
517 0
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
518 },
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
519 banked : false
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
520 },
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jlarmour
parents: 195
diff changeset
521 #endif
195
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jlarmour
parents: 174
diff changeset
522
161
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jlarmour
parents:
diff changeset
523 #endif // 16 bit devices
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jlarmour
parents:
diff changeset
524
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
525 #endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL