changeset 2671:12ae993c7267

Various Cortex-M patches.
author nickg
date Mon, 24 Nov 2008 15:43:50 +0000
parents 986cdcf95aaf
children e535f3bda77b
files packages/hal/cortexm/arch/current/ChangeLog packages/hal/cortexm/arch/current/include/hal_io.h packages/hal/cortexm/stm32/var/current/ChangeLog packages/hal/cortexm/stm32/var/current/include/var_intr.h packages/hal/cortexm/stm32/var/current/include/var_io.h
diffstat 5 files changed, 27 insertions(+), 11 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/arch/current/ChangeLog
+++ b/packages/hal/cortexm/arch/current/ChangeLog
@@ -1,3 +1,7 @@
+2008-11-24  Simon Kallweit  <simon.kallweit@intefo.ch>
+
+	* include/hal_io.c: Fixed MASK_ macro.
+
 2008-11-04  Simon Kallweit  <simon.kallweit@intefo.ch>
 
 	* include/hal_intr.h:
--- a/packages/hal/cortexm/arch/current/include/hal_io.h
+++ b/packages/hal/cortexm/arch/current/include/hal_io.h
@@ -59,7 +59,7 @@
 //
 
 #define BIT_(__n)       (1<<(__n))
-#define MASK_(__n,__s)  (((1<<((__s)+1))-1)<<(__n))
+#define MASK_(__n,__s)  (((1<<(__s))-1)<<(__n))
 #define VALUE_(__n,__v) ((__v)<<(__n))
 
 //==========================================================================
--- a/packages/hal/cortexm/stm32/var/current/ChangeLog
+++ b/packages/hal/cortexm/stm32/var/current/ChangeLog
@@ -1,3 +1,15 @@
+2008-11-24  Nick Garnett  <nickg@ecoscentric.com>
+
+	* include/var_intr.h (CYGNUM_HAL_INTERRUPT_DMA1_CHX): Rename DMA0
+	to DMA1 to match ST's numbering elsewhere.
+
+	* include/var_io.h (CYGHWR_HAL_STM32_GPIO_CFG): Remove PULLUP bit
+	from mask. Previous addition was incorrect.
+
+2008-11-24  Simon Kallweit  <simon.kallweit@intefo.ch>
+
+	* include/var_io.h: Corrected capitalisation.
+	
 2008-11-12  Simon Kallweit  <simon.kallweit@intefo.ch>
 
 	* include/var_io.h: Changed CYGHWR_HAL_STM32_BD_UNPROTECT to
--- a/packages/hal/cortexm/stm32/var/current/include/var_intr.h
+++ b/packages/hal/cortexm/stm32/var/current/include/var_intr.h
@@ -70,13 +70,13 @@
 #define CYGNUM_HAL_INTERRUPT_EXTI3              ( 9+CYGNUM_HAL_INTERRUPT_EXTERNAL)
 
 #define CYGNUM_HAL_INTERRUPT_EXTI4              (10+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH1           (11+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH2           (12+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH3           (13+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH4           (14+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH5           (15+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH6           (16+CYGNUM_HAL_INTERRUPT_EXTERNAL)
-#define CYGNUM_HAL_INTERRUPT_DMA0_CH7           (17+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH1           (11+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH2           (12+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH3           (13+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH4           (14+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH5           (15+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH6           (16+CYGNUM_HAL_INTERRUPT_EXTERNAL)
+#define CYGNUM_HAL_INTERRUPT_DMA1_CH7           (17+CYGNUM_HAL_INTERRUPT_EXTERNAL)
 #define CYGNUM_HAL_INTERRUPT_ADC1_2             (18+CYGNUM_HAL_INTERRUPT_EXTERNAL)
 #define CYGNUM_HAL_INTERRUPT_USB_HP             (19+CYGNUM_HAL_INTERRUPT_EXTERNAL)
 #define CYGNUM_HAL_INTERRUPT_CAN_TX             (19+CYGNUM_HAL_INTERRUPT_EXTERNAL)
--- a/packages/hal/cortexm/stm32/var/current/include/var_io.h
+++ b/packages/hal/cortexm/stm32/var/current/include/var_io.h
@@ -306,8 +306,8 @@
 #define CYGHWR_HAL_STM32_GPIO_LCKR              0x18
 
 #define CYGHWR_HAL_STM32_GPIO_MODE_IN           VALUE_(0,0)     // Input mode
-#define CYGHWR_HAL_STM32_GPIO_MODE_OUT_10MHz    VALUE_(0,1)     // Output mode, max 10MHz
-#define CYGHWR_HAL_STM32_GPIO_MODE_OUT_2MHz     VALUE_(0,2)     // Output mode, max 2MHz
+#define CYGHWR_HAL_STM32_GPIO_MODE_OUT_10MHZ    VALUE_(0,1)     // Output mode, max 10MHz
+#define CYGHWR_HAL_STM32_GPIO_MODE_OUT_2MHZ     VALUE_(0,2)     // Output mode, max 2MHz
 #define CYGHWR_HAL_STM32_GPIO_MODE_OUT_50MHZ    VALUE_(0,3)     // Output mode, max 50MHz
 
 #define CYGHWR_HAL_STM32_GPIO_CNF_AIN           VALUE_(2,0)     // Analog input
@@ -350,7 +350,7 @@
 // Macros to extract encoded values
 #define CYGHWR_HAL_STM32_GPIO_PORT(__pin)       (CYGHWR_HAL_STM32_GPIOA+((__pin)&0x0000FF00))
 #define CYGHWR_HAL_STM32_GPIO_BIT(__pin)        (((__pin)>>16)&0x1F)
-#define CYGHWR_HAL_STM32_GPIO_CFG(__pin)        ((__pin)&0x1F)
+#define CYGHWR_HAL_STM32_GPIO_CFG(__pin)        ((__pin)&0xF)
 #define CYGHWR_HAL_STM32_GPIO_PULLUP            BIT_(4)