Mercurial > ecos-v3_0-branch
changeset 2672:e535f3bda77b
* include/plf_io.h: Useless and not-portable IO macros removed.
* src/olpce2294_misc.c: LCD driver reworked with a use eCos I/O
macros.
| author | asl |
|---|---|
| date | Sun, 30 Nov 2008 09:40:58 +0000 |
| parents | 12ae993c7267 |
| children | f3e0cac7b6d2 |
| files | packages/hal/arm/lpc2xxx/olpce2294/current/ChangeLog packages/hal/arm/lpc2xxx/olpce2294/current/include/plf_io.h packages/hal/arm/lpc2xxx/olpce2294/current/src/olpce2294_misc.c |
| diffstat | 3 files changed, 98 insertions(+), 41 deletions(-) [+] |
line wrap: on
line diff
--- a/packages/hal/arm/lpc2xxx/olpce2294/current/ChangeLog +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/ChangeLog @@ -1,3 +1,9 @@ +2008-11-23 Sergei Gavrikov <sergei.gavrikov@gmail.com> + + * include/plf_io.h: Useless and not-portable IO macros removed. + * src/olpce2294_misc.c: LCD driver reworked with a use eCos I/O + macros. + 2008-08-31 Sergei Gavrikov <sergei.gavrikov@gmail.com> * LPC-E2294 development board package
--- a/packages/hal/arm/lpc2xxx/olpce2294/current/include/plf_io.h +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/include/plf_io.h @@ -57,29 +57,6 @@ extern void hal_plf_hardware_init(void); #define HAL_PLF_HARDWARE_INIT() \ hal_plf_hardware_init() -#define IO0PIN (*(volatile unsigned int *)0xE0028000) -#define IO0SET (*(volatile unsigned int *)0xE0028004) -#define IO0DIR (*(volatile unsigned int *)0xE0028008) -#define IO0CLR (*(volatile unsigned int *)0xE002800C) - -#define IO1PIN (*(volatile unsigned int *)0xE0028010) -#define IO1SET (*(volatile unsigned int *)0xE0028014) -#define IO1DIR (*(volatile unsigned int *)0xE0028018) -#define IO1CLR (*(volatile unsigned int *)0xE002801C) - -#define IO2PIN (*(volatile unsigned int *)0xE0028020) -#define IO2SET (*(volatile unsigned int *)0xE0028024) -#define IO2DIR (*(volatile unsigned int *)0xE0028028) -#define IO2CLR (*(volatile unsigned int *)0xE002802C) - -#define IO3PIN (*(volatile unsigned int *)0xE0028030) -#define IO3SET (*(volatile unsigned int *)0xE0028034) -#define IO3DIR (*(volatile unsigned int *)0xE0028038) -#define IO3CLR (*(volatile unsigned int *)0xE002803C) - -#define PINSEL0 (*(volatile unsigned int *)0xE002C00) -#define PINSEL1 (*(volatile unsigned int *)0xE002C04) - #endif // __ASSEMBLER__ //-----------------------------------------------------------------------------
--- a/packages/hal/arm/lpc2xxx/olpce2294/current/src/olpce2294_misc.c +++ b/packages/hal/arm/lpc2xxx/olpce2294/current/src/olpce2294_misc.c @@ -196,36 +196,76 @@ static int lcd_linepos = 0; // Set RS, R/W to read data #define LCD_RS_READ_DATA() \ CYG_MACRO_START \ - IO0SET |= MPU_RW; \ - IO0SET |= MPU_RS; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + _t_ |= MPU_RW | MPU_RS; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ CYG_MACRO_END // Set RS, R/W to read a busy flag and address counter #define LCD_RS_READ_STAT() \ CYG_MACRO_START \ - IO0SET |= MPU_RW; \ - IO0CLR |= MPU_RS; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + _t_ |= MPU_RW; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_RS; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ CYG_MACRO_END // Set RS, R/W to write data #define LCD_RS_WRITE_DATA() \ CYG_MACRO_START \ - IO0CLR |= MPU_RW; \ - IO0SET |= MPU_RS; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_RW; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + _t_ |= MPU_RS; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ CYG_MACRO_END // Set RS, R/W to write an instruction #define LCD_RS_WRITE_CMD() \ CYG_MACRO_START \ - IO0CLR |= MPU_RW; \ - IO0CLR |= MPU_RS; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_RW | MPU_RS; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ CYG_MACRO_END #define LCD_ENABLE_HIGH() \ - IO0SET |= MPU_EN; + CYG_MACRO_START \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + _t_ |= MPU_EN; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + CYG_MACRO_END #define LCD_ENABLE_LOW() \ - IO0CLR |= MPU_EN; + CYG_MACRO_START \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_EN; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + CYG_MACRO_END // High-level enable pulse #define LCD_ENABLE_PULSE() \ @@ -239,17 +279,52 @@ static int lcd_linepos = 0; // Read a nibble of data from LCD controller #define LCD_READ_NIBBLE( _n_) \ CYG_MACRO_START \ - IO0DIR &= ~MPU_DB; \ - _n_ = (IO0PIN & MPU_DB) >> 4; \ - _n_ &= 15; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + _t_ &= ~MPU_DB; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0PIN, _t_); \ + _n_ = (_t_ & MPU_DB) >> 4; _n_ &= 0x0f; \ CYG_MACRO_END // Write a nibble of data to LCD controller #define LCD_WRITE_NIBBLE( _n_) \ CYG_MACRO_START \ - IO0DIR |= MPU_DB; \ - IO0CLR |= MPU_DB; \ - IO0SET |= ((_n_) & 15) << 4; \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + _t_ |= MPU_DB; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_DB; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + _t_ |= ((_n_) & 0x0f) << 4; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0SET, _t_); \ + CYG_MACRO_END + +// Drop LCD on POTS +#define LCD_DROP_ON_POTS( _n_) \ + CYG_MACRO_START \ + cyg_uint32 _t_; \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + _t_ |= MPU_XX; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0DIR, _t_); \ + HAL_READ_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ + _t_ |= MPU_XX; \ + HAL_WRITE_UINT32(CYGARC_HAL_LPC2XXX_REG_IO_BASE + \ + CYGARC_HAL_LPC2XXX_REG_IO0CLR, _t_); \ CYG_MACRO_END //-------------------------------------------------------------------------- @@ -328,8 +403,7 @@ static void { // around power on - IO0DIR |= MPU_XX; - IO0CLR |= MPU_XX; + LCD_DROP_ON_POTS (); // wait for more than 30 ms after Vdd rises to 4.5 V LCD_DELAY_US (32000);