Mercurial > ecos
annotate packages/kernel/current/tests/intr0.cxx @ 2979:00ddfb443539
* tests/intr0.cxx (intr0_main): Fix a compiler warning by changing
a CHECK() statement.
| author | sergeig |
|---|---|
| date | Wed, 24 Nov 2010 18:40:20 +0000 |
| parents | 74dbf4c3f2e1 |
| children |
| rev | line source |
|---|---|
| 0 | 1 //================================================================= |
| 2 // | |
| 3 // intr0.cxx | |
| 4 // | |
| 5 // Interrupt test 0 | |
| 6 // | |
| 7 //================================================================= | |
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8 // ####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
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12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later |
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16 // version. |
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17 // |
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18 // eCos is distributed in the hope that it will be useful, but WITHOUT |
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19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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21 // for more details. |
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22 // |
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23 // You should have received a copy of the GNU General Public License |
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24 // along with eCos; if not, write to the Free Software Foundation, Inc., |
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25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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26 // |
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27 // As a special exception, if other files instantiate templates or use |
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28 // macros or inline functions from this file, or you compile this file |
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29 // and link it with other works to produce a work based on this file, |
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30 // this file does not by itself cause the resulting work to be covered by |
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31 // the GNU General Public License. However the source code for this file |
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32 // must still be made available in accordance with section (3) of the GNU |
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33 // General Public License v2. |
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34 // |
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35 // This exception does not invalidate any other reasons why a work based |
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36 // on this file might be covered by the GNU General Public License. |
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37 // ------------------------------------------- |
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38 // ####ECOSGPLCOPYRIGHTEND#### |
| 0 | 39 //================================================================= |
| 40 //#####DESCRIPTIONBEGIN#### | |
| 41 // | |
| 42 // Author(s): dsm | |
| 2 | 43 // Contributors: dsm, jlarmour |
| 44 // Date: 1999-02-16 | |
| 0 | 45 // Description: Very basic test of interrupt objects |
| 46 // Options: | |
| 47 // CYGIMP_KERNEL_INTERRUPTS_DSRS_TABLE | |
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48 // CYGNUM_KERNEL_INTERRUPTS_DSRS_TABLE_SIZE |
| 0 | 49 // CYGIMP_KERNEL_INTERRUPTS_DSRS_LIST |
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50 // CYGSEM_KERNEL_INTERRUPTS_DSRS_LIST_FIFO |
| 0 | 51 //####DESCRIPTIONEND#### |
| 52 | |
| 53 #include <pkgconf/kernel.h> | |
| 54 | |
| 55 #include <cyg/kernel/intr.hxx> | |
| 56 #include <cyg/hal/hal_intr.h> | |
| 57 | |
| 58 #include <cyg/infra/testcase.h> | |
| 59 | |
| 60 #include "testaux.hxx" | |
| 61 | |
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62 #ifdef HAL_INTR_TEST_PRIO_A |
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63 # define PRIO_A HAL_INTR_TEST_PRIO_A |
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64 #else |
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65 # define PRIO_A 0 |
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66 #endif |
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67 |
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68 #ifdef HAL_INTR_TEST_PRIO_B |
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69 # define PRIO_B HAL_INTR_TEST_PRIO_B |
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70 #else |
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71 # define PRIO_B 1 |
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72 #endif |
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73 |
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74 #ifdef HAL_INTR_TEST_PRIO_C |
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75 # define PRIO_C HAL_INTR_TEST_PRIO_C |
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76 #else |
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77 # define PRIO_C 1 |
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78 #endif |
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79 |
| 0 | 80 static cyg_ISR isr0, isr1; |
| 81 static cyg_DSR dsr0, dsr1; | |
| 82 | |
| 2 | 83 static char intr0_obj[sizeof(Cyg_Interrupt)]; |
| 84 static char intr1_obj[sizeof(Cyg_Interrupt)]; | |
| 85 | |
| 0 | 86 static cyg_uint32 isr0(cyg_vector vector, CYG_ADDRWORD data) |
| 87 { | |
| 88 CYG_UNUSED_PARAM(CYG_ADDRWORD, data); | |
| 89 | |
| 90 Cyg_Interrupt::acknowledge_interrupt(vector); | |
| 91 return 0; | |
| 92 } | |
| 93 | |
| 94 static void dsr0(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data) | |
| 95 { | |
| 96 CYG_UNUSED_PARAM(cyg_vector, vector); | |
| 97 CYG_UNUSED_PARAM(cyg_ucount32, count); | |
| 98 CYG_UNUSED_PARAM(CYG_ADDRWORD, data); | |
| 99 } | |
| 100 | |
| 101 static cyg_uint32 isr1(cyg_vector vector, CYG_ADDRWORD data) | |
| 102 { | |
| 103 CYG_UNUSED_PARAM(cyg_vector, vector); | |
| 104 CYG_UNUSED_PARAM(CYG_ADDRWORD, data); | |
| 105 return 0; | |
| 106 } | |
| 107 | |
| 108 static void dsr1(cyg_vector vector, cyg_ucount32 count, CYG_ADDRWORD data) | |
| 109 { | |
| 110 CYG_UNUSED_PARAM(cyg_vector, vector); | |
| 111 CYG_UNUSED_PARAM(cyg_ucount32, count); | |
| 112 CYG_UNUSED_PARAM(CYG_ADDRWORD, data); | |
| 113 } | |
| 114 | |
| 115 static bool flash( void ) | |
| 116 { | |
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117 Cyg_Interrupt intr0 = Cyg_Interrupt(CYGNUM_HAL_ISR_MIN, PRIO_A, |
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118 (CYG_ADDRWORD)333, isr0, dsr0 ); |
| 0 | 119 |
| 120 return true; | |
| 121 } | |
| 122 | |
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123 /* IMPORTANT: The calling convention for VSRs is target dependent. It is |
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124 * unlikely that a plain C or C++ routine would function correctly on any |
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125 * particular platform, even if it could correctly access the system |
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126 * resources necessary to handle the event that caused it to be called. |
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127 * VSRs usually must be written in assembly language. |
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128 * |
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129 * This is just a test program. The routine vsr0() below is defined simply |
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130 * to define an address that will be in executable memory. If an event |
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131 * causes this VSR to be called, all bets are off. If it is accidentally |
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132 * installed in the vector for the realtime clock, the system will likely |
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133 * freeze. |
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134 */ |
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135 |
| 0 | 136 static cyg_VSR vsr0; |
| 137 | |
| 138 static void vsr0() | |
| 139 { | |
| 140 } | |
| 141 | |
| 142 void intr0_main( void ) | |
| 143 { | |
| 144 CYG_TEST_INIT(); | |
| 145 | |
| 146 CHECK(flash()); | |
| 147 CHECK(flash()); | |
| 148 | |
| 2 | 149 // Make sure the chosen levels are not already in use. |
| 150 int in_use; | |
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151 cyg_vector lvl1 = CYGNUM_HAL_ISR_MIN + (1 % CYGNUM_HAL_ISR_COUNT); |
| 2 | 152 HAL_INTERRUPT_IN_USE( lvl1, in_use ); |
| 153 Cyg_Interrupt* intr0 = NULL; | |
| 154 if (!in_use) | |
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155 intr0 = new((void *)&intr0_obj[0]) Cyg_Interrupt( lvl1, PRIO_B, (CYG_ADDRWORD)777, isr0, dsr0 ); |
| 2 | 156 |
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157 cyg_vector lvl2 = CYGNUM_HAL_ISR_MIN + ( 15 % CYGNUM_HAL_ISR_COUNT); |
| 2 | 158 HAL_INTERRUPT_IN_USE( lvl2, in_use ); |
| 159 Cyg_Interrupt* intr1 = NULL; | |
| 160 if (!in_use && lvl1 != lvl2) | |
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161 intr1 = new((void *)&intr1_obj[0]) Cyg_Interrupt( lvl2, PRIO_C, 888, isr1, dsr1 ); |
| 0 | 162 |
| 163 // Check these functions at least exist | |
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164 Cyg_Interrupt::disable_interrupts(); |
| 0 | 165 Cyg_Interrupt::enable_interrupts(); |
| 166 | |
| 2 | 167 if (intr0) |
| 168 intr0->attach(); | |
| 169 if (intr1) | |
| 170 intr1->attach(); | |
| 171 if (intr0) | |
| 172 intr0->detach(); | |
| 173 if (intr1) | |
| 174 intr1->detach(); | |
| 0 | 175 |
| 176 // If this attaching interrupt replaces the previous interrupt | |
| 177 // instead of adding to it we could be in a big mess if the | |
| 178 // vector is being used by something important. | |
| 2 | 179 |
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180 cyg_vector v = (CYGNUM_HAL_VSR_MIN + 11) % CYGNUM_HAL_VSR_COUNT; |
| 0 | 181 cyg_VSR *old_vsr, *new_vsr; |
| 182 Cyg_Interrupt::set_vsr( v, vsr0, &old_vsr ); | |
| 183 Cyg_Interrupt::get_vsr( v, &new_vsr ); | |
| 184 CHECK( vsr0 == new_vsr ); | |
| 185 | |
| 186 new_vsr = NULL; | |
| 187 Cyg_Interrupt::set_vsr( v, old_vsr, &new_vsr ); | |
| 188 CHECK( new_vsr == vsr0 ); | |
| 189 | |
| 190 Cyg_Interrupt::set_vsr( v, new_vsr ); | |
| 191 new_vsr = NULL; | |
| 2 | 192 Cyg_Interrupt::get_vsr( v, &new_vsr ); |
| 0 | 193 CHECK( vsr0 == new_vsr ); |
| 194 | |
| 195 Cyg_Interrupt::set_vsr( v, old_vsr ); | |
| 196 CHECK( vsr0 == new_vsr ); | |
| 197 new_vsr = NULL; | |
| 198 Cyg_Interrupt::get_vsr( v, &new_vsr ); | |
| 199 CHECK( old_vsr == new_vsr ); | |
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200 |
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201 CHECK( NULL != new_vsr); |
| 0 | 202 |
| 2 | 203 cyg_vector v1; |
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204 #ifdef CYGPKG_HAL_MIPS_TX39 |
| 2 | 205 // This can be removed when PR 17831 is fixed |
| 206 if ( cyg_test_is_simulator ) | |
| 207 v1 = 12 % CYGNUM_HAL_ISR_COUNT; | |
| 208 else /* NOTE TRAILING ELSE... */ | |
| 209 #endif | |
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210 v1 = CYGNUM_HAL_ISR_MIN + (6 % CYGNUM_HAL_ISR_COUNT); |
| 2 | 211 |
| 0 | 212 Cyg_Interrupt::mask_interrupt(v1); |
| 213 Cyg_Interrupt::unmask_interrupt(v1); | |
| 214 | |
| 215 Cyg_Interrupt::configure_interrupt(v1, true, true); | |
| 216 | |
| 217 CYG_TEST_PASS_FINISH("Intr 0 OK"); | |
| 218 } | |
| 219 | |
| 220 externC void | |
| 221 cyg_start( void ) | |
| 222 { | |
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223 #ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG |
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224 cyg_hal_invoke_constructors(); |
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225 #endif |
| 0 | 226 intr0_main(); |
| 227 } | |
| 228 // EOF intr0.cxx |
