Mercurial > ecos
annotate packages/hal/arm/arch/current/src/vectors.S @ 46:797268ecc331 ecos-sw-1999-10-19
Merge from eCos master repository on 1999-10-19-18:55:31-BST
| author | jlarmour |
|---|---|
| date | Tue, 19 Oct 1999 19:19:52 +0000 |
| parents | a3cc6665b684 |
| children | a0774359f013 |
| rev | line source |
|---|---|
| 2 | 1 // #======================================================================== |
| 2 // # | |
| 3 // # vectors.S | |
| 4 // # | |
| 5 // # ARM exception vectors | |
| 6 // # | |
| 7 // #======================================================================== | |
| 8 // ####COPYRIGHTBEGIN#### | |
| 9 // | |
| 10 // ------------------------------------------- | |
| 11 // The contents of this file are subject to the Cygnus eCos Public License | |
| 12 // Version 1.0 (the "License"); you may not use this file except in | |
| 13 // compliance with the License. You may obtain a copy of the License at | |
| 14 // http://sourceware.cygnus.com/ecos | |
| 15 // | |
| 16 // Software distributed under the License is distributed on an "AS IS" | |
| 17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the | |
| 18 // License for the specific language governing rights and limitations under | |
| 19 // the License. | |
| 20 // | |
| 21 // The Original Code is eCos - Embedded Cygnus Operating System, released | |
| 22 // September 30, 1998. | |
| 23 // | |
| 24 // The Initial Developer of the Original Code is Cygnus. Portions created | |
| 25 // by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. | |
| 26 // ------------------------------------------- | |
| 27 // | |
| 28 // ####COPYRIGHTEND#### | |
| 29 // #======================================================================== | |
| 30 // ######DESCRIPTIONBEGIN#### | |
| 31 // # | |
| 32 // # Author(s): nickg, gthomas | |
| 33 // # Contributors: nickg, gthomas | |
| 34 // # Date: 1999-02-20 | |
| 35 // # Purpose: ARM exception vectors | |
| 36 // # Description: This file defines the code placed into the exception | |
| 37 // # vectors. It also contains the first level default VSRs | |
| 38 // # that save and restore state for both exceptions and | |
| 39 // # interrupts. | |
| 40 // # | |
| 41 // #####DESCRIPTIONEND#### | |
| 42 // # | |
| 43 // #======================================================================== | |
| 44 | |
| 45 #include <pkgconf/hal.h> | |
| 46 #include <pkgconf/hal_arm.h> | |
| 47 #ifdef CYGPKG_KERNEL // no CDL yet | |
| 48 #include <pkgconf/kernel.h> | |
| 49 #else | |
| 50 # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT | |
|
6
d376b777e2ce
Merge from eCos master repository on 1999-05-14-19:27:43-BST
jlarmour
parents:
4
diff
changeset
|
51 # undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK |
| 2 | 52 #endif |
| 53 #include <cyg/hal/hal_platform_setup.h> | |
| 54 | |
| 55 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 56 // The CDL should enforce this | |
| 57 #undef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 58 #endif | |
| 59 | |
| 60 #include "arm.inc" | |
| 61 | |
| 62 #define FUNC_START(name) \ | |
| 63 .globl _name; \ | |
| 64 _name: | |
| 65 | |
| 66 #define PTR(name) \ | |
| 67 .##name: .word name | |
| 68 | |
|
16
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
69 #ifdef CYGHWR_HAL_ARM_HAS_MMU |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
70 #define UNMAPPED(x) ((x)-__exception_handlers) |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
71 #else |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
72 #define UNMAPPED(x) (x) |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
73 #endif |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
74 |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
75 #define UNMAPPED_PTR(name) \ |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
76 .##name: .word UNMAPPED(name) |
|
4f2df4ab82c8
Merge from eCos master repository on 1999-06-18-15:25:04-BST
jlarmour
parents:
14
diff
changeset
|
77 |
| 2 | 78 |
| 79 .file "vectors.S" | |
| 80 | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
81 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
82 .macro LED x |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
83 .endm |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
84 |
| 2 | 85 |
| 86 //========================================================================== | |
| 87 // Hardware exception vectors. | |
| 88 // This entire section will be copied to location 0x0000 at startup time. | |
| 89 // | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
90 .code 32 |
| 2 | 91 .section ".vectors","ax" |
| 92 .global __exception_handlers | |
| 93 __exception_handlers: | |
| 94 ldr pc,.reset_vector // 0x00 | |
| 95 ldr pc,.undefined_instruction // 0x04 | |
| 96 ldr pc,.software_interrupt // 0x08 start && software int | |
| 97 ldr pc,.abort_prefetch // 0x0C | |
| 98 ldr pc,.abort_data // 0x10 | |
| 99 .word 0 // unused | |
| 100 ldr pc,.IRQ // 0x18 | |
| 101 ldr pc,.FIQ // 0x1C | |
| 102 | |
| 103 // The layout of these pointers should match the vector table above since | |
| 104 // they are copied in pairs. | |
| 105 .global vectors | |
| 106 vectors: | |
|
26
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
107 UNMAPPED_PTR(reset_vector) // 0x20 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
108 PTR(undefined_instruction) // 0x24 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
109 PTR(software_interrupt) // 0x28 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
110 PTR(abort_prefetch) // 0x2C |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
111 PTR(abort_data) // 0x30 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
112 .word 0 // 0x34 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
113 PTR(IRQ) // 0x38 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
114 PTR(FIQ) // 0x3c |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
115 PTR(start) // This is copied to 0x28 for bootup // 0x40 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
116 // location 0x40 is used for storing DRAM size if known |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
117 // for some platforms. |
| 2 | 118 |
|
46
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
119 // Other vectors |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
120 .balign 16 // Should be at 0x50 |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
121 .balign 32 |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
122 |
| 2 | 123 .text |
| 124 // Startup code which will get the machine into supervisor mode | |
| 125 .global reset_vector | |
| 126 .type reset_vector,function | |
| 127 reset_vector: | |
|
46
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
128 PLATFORM_SETUP1 // Early stage platform initialization |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
129 // which can set DRAM size at 0x40 |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
130 // see <cyg/hal/hal_platform_setup.h> |
|
4
1d7f19c9e4d1
Merge from eCos master repository on 1999-05-11-21:11:10-BST
jlarmour
parents:
2
diff
changeset
|
131 |
| 2 | 132 #if defined(CYG_HAL_STARTUP_RAM) && \ |
| 133 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) | |
| 134 mrs r7,cpsr // move back to IRQ mode | |
| 135 and r7,r7,#CPSR_MODE_BITS | |
| 136 cmp r7,#CPSR_SUPERVISOR_MODE | |
| 137 beq start | |
| 138 #endif | |
| 139 | |
|
26
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
140 // We cannot access any LED registers until after PLATFORM_SETUP1 |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
141 LED 7 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
142 |
| 2 | 143 mov r0,#0 // move vectors |
|
26
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
144 // We cannot perform a store until after PLATFORM_SETUP1 |
|
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
145 str r0, [r0,#0x40] // DRAM size to zero => unknown |
|
46
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
146 |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
147 ldr r1,=__exception_handlers |
|
36
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
148 #ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
149 // Wait with this if stubs are included (see further down). |
| 2 | 150 ldr r2,[r1,#0x04] // undefined instruction |
| 151 str r2,[r0,#0x04] | |
| 152 ldr r2,[r1,#0x24] | |
| 153 str r2,[r0,#0x24] | |
|
36
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
154 #endif |
| 2 | 155 ldr r2,[r1,#0x08] // software interrupt |
| 156 str r2,[r0,#0x08] | |
|
46
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
157 |
|
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
158 |
|
14
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
159 #if defined(CYG_HAL_STARTUP_RAM) |
|
36
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
160 // Ugly hack to get into supervisor mode |
| 2 | 161 ldr r2,[r1,#0x40] |
| 162 str r2,[r0,#0x28] | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
163 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
164 LED 6 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
165 |
| 2 | 166 swi // switch to supervisor mode |
|
14
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
167 #endif |
| 2 | 168 |
| 169 // ========================================================================= | |
| 170 // Real startup code. We jump here from the reset vector to set up the world. | |
| 171 .globl start | |
| 172 start: | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
173 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
174 LED 5 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
175 |
| 2 | 176 #if defined(CYG_HAL_STARTUP_RAM) && \ |
| 177 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) | |
| 178 // If we get restarted, hang here to avoid corrupting memory | |
| 179 ldr r0,.init_flag | |
| 180 ldr r1,[r0] | |
| 181 1: cmp r1,#0 | |
| 182 bne 1b | |
| 183 ldr r1,init_done | |
| 184 str r1,[r0] | |
| 185 #endif | |
| 186 | |
| 187 // Reset software interrupt pointer | |
| 188 mov r0,#0 // move vectors | |
| 189 ldr r1,.__exception_handlers | |
| 190 #if defined(CYG_HAL_STARTUP_RAM) && \ | |
| 191 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) | |
| 192 cmp r7,#CPSR_SUPERVISOR_MODE | |
| 193 beq 10f | |
| 194 #endif | |
| 195 ldr r2,[r1,#0x28] // software interrupt | |
| 196 str r2,[r0,#0x28] | |
| 197 10: | |
| 198 ldr r2,[r1,#0x18] // IRQ | |
| 199 str r2,[r0,#0x18] | |
| 200 ldr r2,[r1,#0x38] | |
| 201 str r2,[r0,#0x38] | |
| 202 ldr r2,[r1,#0x1C] // FIQ | |
| 203 str r2,[r0,#0x1C] | |
| 204 ldr r2,[r1,#0x3C] | |
| 205 str r2,[r0,#0x3C] | |
| 206 ldr r2,[r1,#0x0C] // abort (prefetch) | |
| 207 str r2,[r0,#0x0C] | |
| 208 ldr r2,[r1,#0x2C] | |
| 209 str r2,[r0,#0x2C] | |
| 210 ldr r2,[r1,#0x10] // abort (data) | |
| 211 str r2,[r0,#0x10] | |
| 212 ldr r2,[r1,#0x30] | |
| 213 str r2,[r0,#0x30] | |
| 214 | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
215 LED 4 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
216 |
| 2 | 217 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_STUBS) |
| 218 // Relocate [copy] data from ROM to RAM | |
| 219 ldr r3,.__rom_data_start | |
| 220 ldr r4,.__ram_data_start | |
| 221 ldr r5,.__ram_data_end | |
| 222 cmp r4,r5 // jump if no data to move | |
| 223 beq 2f | |
| 224 sub r3,r3,#4 // loop adjustments | |
| 225 sub r4,r4,#4 | |
| 226 1: ldr r0,[r3,#4]! // copy info | |
| 227 str r0,[r4,#4]! | |
| 228 cmp r4,r5 | |
| 229 bne 1b | |
| 230 2: | |
| 231 #endif | |
| 232 | |
| 233 // initialize interrupt/exception environments | |
| 234 ldr sp,.__startup_stack | |
| 235 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_IRQ_MODE) | |
| 236 msr cpsr,r0 | |
| 237 ldr sp,.__exception_stack | |
|
4
1d7f19c9e4d1
Merge from eCos master repository on 1999-05-11-21:11:10-BST
jlarmour
parents:
2
diff
changeset
|
238 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_FIQ_MODE) |
|
1d7f19c9e4d1
Merge from eCos master repository on 1999-05-11-21:11:10-BST
jlarmour
parents:
2
diff
changeset
|
239 msr cpsr,r0 |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
240 ldr sp,.__FIQ_exception_stack |
| 2 | 241 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE) |
| 242 msr cpsr,r0 | |
| 243 ldr sp,.__exception_stack | |
| 244 | |
| 245 // initialize CPSR (machine state register) | |
| 246 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE) | |
| 247 msr cpsr,r0 | |
| 248 | |
| 249 // Note: some functions in LIBGCC1 will cause a "restore from SPSR"!! | |
| 250 msr spsr,r0 | |
| 251 | |
| 252 // initialize stack | |
| 253 ldr sp,.__startup_stack | |
| 254 | |
| 255 // clear BSS | |
| 256 ldr r1,.__bss_start | |
| 257 ldr r2,.__bss_end | |
| 258 mov r0,#0 | |
| 259 cmp r1,r2 | |
| 260 beq 2f | |
|
6
d376b777e2ce
Merge from eCos master repository on 1999-05-14-19:27:43-BST
jlarmour
parents:
4
diff
changeset
|
261 1: str r0,[r1],#4 |
| 2 | 262 cmp r1,r2 |
| 263 bne 1b | |
| 264 2: | |
| 265 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
266 |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
267 LED 3 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
268 |
| 2 | 269 // Call platform specific hardware initialization |
| 270 bl hal_hardware_init | |
| 271 | |
|
36
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
272 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
273 bl initialize_stub |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
274 |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
275 // Now that stub is initialized, change vector. It is possible |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
276 // to single-step through most of the init code, except the below. |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
277 // Put a breakpoint at the call to cyg_hal_invoke_constructors to |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
278 // pass over this bit (s-s depends on internal state in the stub). |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
279 mov r0,#0 // move vectors |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
280 ldr r1,=__exception_handlers |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
281 ldr r2,[r1,#0x04] // undefined instruction |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
282 str r2,[r0,#0x04] |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
283 ldr r2,[r1,#0x24] |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
284 str r2,[r0,#0x24] |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
285 #endif |
|
e97d78785e2d
Merge from eCos master repository on 1999-09-12-15:40:34-BST
jlarmour
parents:
34
diff
changeset
|
286 |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
287 LED 2 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
288 |
| 2 | 289 // Run through static constructors |
| 290 bl cyg_hal_invoke_constructors | |
| 291 | |
|
26
4741a3c3496a
Merge from eCos master repository on 1999-07-23-05:47:06-BST
jlarmour
parents:
24
diff
changeset
|
292 LED 1 |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
293 |
| 2 | 294 // This starts up the eCos kernel |
| 295 bl cyg_start | |
| 296 _start_hang: | |
| 297 b _start_hang | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
298 .code 32 |
| 2 | 299 |
| 300 init_done: | |
| 301 .long 0xDEADB00B | |
| 302 | |
| 303 // | |
| 304 // Exception handlers | |
|
46
797268ecc331
Merge from eCos master repository on 1999-10-19-18:55:31-BST
jlarmour
parents:
40
diff
changeset
|
305 // Assumption: get here from a Supervisor context [mode] |
| 2 | 306 // |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
307 .code 32 |
| 2 | 308 undefined_instruction: |
| 309 ldr sp,.__undef_exception_stack // get good stack | |
| 310 sub lr,lr,#4 // PC at time of interrupt | |
| 311 stmfd sp!,{r0,fp,ip,lr} | |
| 312 mrs r0,spsr | |
| 313 stmfd sp!,{r0} | |
| 314 mov ip,sp // save SP which will vanish with | |
| 315 // mode switch | |
| 316 mrs r0,cpsr // switch to Supervisor Mode | |
| 317 bic r0,r0,#CPSR_MODE_BITS | |
| 318 orr r0,r0,#CPSR_SUPERVISOR_MODE | |
| 319 msr cpsr,r0 // sp,lr are now old values | |
| 320 mov fp,sp | |
| 321 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 322 ldr sp,.__GDB_stack | |
| 323 cmp fp,sp // already on GDB stack? | |
| 324 bhi 10f | |
| 325 ldr r0,.__GDB_stack_base | |
| 326 cmp fp,r0 | |
| 327 bls 10f // no - switch to GDB stack | |
| 328 // (already in sp) | |
| 329 mov sp,fp // yes - no switch | |
| 330 10: | |
| 331 #endif | |
| 332 sub sp,sp,#ARMREG_SIZE // make space for frame | |
| 333 stmea sp,{r0-r10,fp} // save immediately visible registers | |
| 334 ldmfd ip,{r0-r4} // saved registers | |
| 335 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt | |
| 336 str r1,[sp,#armreg_r0] // saved R0 | |
| 337 str r2,[sp,#armreg_fp] // saved FP | |
| 338 str r3,[sp,#armreg_ip] // saved IP | |
| 339 str r4,[sp,#armreg_pc] // PC at time of interrupt | |
| 340 str lr,[sp,#armreg_lr] // LR at time of interrupt | |
| 341 add r0,ip,#ARMREG_SIZE | |
| 342 str fp,[sp,#armreg_sp] // SP at time of interrupt | |
| 343 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 344 mov r0,sp | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
345 bl cyg_hal_report_undefined_instruction |
| 2 | 346 #endif |
| 347 mov v1,#CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION | |
| 348 b call_exception_handler | |
| 349 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
350 .code 32 |
| 2 | 351 software_interrupt: |
| 352 ldr sp,.__startup_stack // get good stack | |
| 353 sub lr,lr,#4 // PC at time of interrupt | |
| 354 stmfd sp!,{r0,ip,lr} | |
| 355 mrs r0,spsr | |
| 356 stmfd sp!,{r0} | |
| 357 mov ip,sp // save SP which will vanish with | |
| 358 // mode switch | |
| 359 mrs r0,cpsr // switch to Supervisor Mode | |
| 360 bic r0,r0,#CPSR_MODE_BITS | |
| 361 orr r0,r0,#CPSR_SUPERVISOR_MODE | |
| 362 msr cpsr,r0 // sp,lr are now old values | |
| 363 mov ip,sp | |
| 364 ldr sp,.__startup_stack // get good stack | |
| 365 sub sp,sp,#ARMREG_SIZE+16 // make space for frame | |
| 366 stmea sp,{r0-r10,fp} // save immediately visible registers | |
| 367 ldmfd ip,{r0-r3} // saved registers | |
| 368 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt | |
| 369 str r1,[sp,#armreg_r0] // saved R0 | |
| 370 str r2,[sp,#armreg_ip] // saved IP | |
| 371 str r3,[sp,#armreg_pc] // PC at time of interrupt | |
| 372 str lr,[sp,#armreg_lr] // LR at time of interrupt | |
| 373 add r0,ip,#ARMREG_SIZE | |
| 374 str r0,[sp,#armreg_sp] // SP at time of interrupt | |
| 375 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 376 mov r0,sp | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
377 bl cyg_hal_report_software_interrupt |
| 2 | 378 #endif |
| 379 mov v1,#CYGNUM_HAL_EXCEPTION_INTERRUPT | |
| 380 b call_exception_handler | |
| 381 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
382 .code 32 |
| 2 | 383 abort_prefetch: |
| 384 ldr sp,.__undef_exception_stack // get good stack | |
| 385 sub lr,lr,#4 // PC at time of interrupt | |
| 386 stmfd sp!,{r0,fp,ip,lr} | |
| 387 mrs r0,spsr | |
| 388 stmfd sp!,{r0} | |
| 389 mov ip,sp // save SP which will vanish with | |
| 390 // mode switch | |
| 391 mrs r0,cpsr // switch to Supervisor Mode | |
| 392 bic r0,r0,#CPSR_MODE_BITS | |
| 393 orr r0,r0,#CPSR_SUPERVISOR_MODE | |
| 394 msr cpsr,r0 // sp,lr are now old values | |
| 395 mov fp,sp | |
| 396 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 397 ldr sp,.__GDB_stack | |
| 398 cmp fp,sp // already on GDB stack? | |
| 399 bhi 10f | |
| 400 ldr r0,.__GDB_stack_base | |
| 401 cmp fp,r0 | |
| 402 bls 10f // no - switch to GDB stack | |
| 403 // (already in sp) | |
| 404 mov sp,fp // yes - no switch | |
| 405 10: | |
| 406 #endif | |
| 407 sub sp,sp,#ARMREG_SIZE // make space for frame | |
| 408 stmea sp,{r0-r10,fp} // save immediately visible registers | |
| 409 ldmfd ip,{r0-r4} // saved registers | |
| 410 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt | |
| 411 str r1,[sp,#armreg_r0] // saved R0 | |
| 412 str r2,[sp,#armreg_fp] // saved FP | |
| 413 str r3,[sp,#armreg_ip] // saved IP | |
| 414 str r4,[sp,#armreg_pc] // PC at time of interrupt | |
| 415 str lr,[sp,#armreg_lr] // LR at time of interrupt | |
| 416 add r0,ip,#ARMREG_SIZE | |
| 417 str fp,[sp,#armreg_sp] // SP at time of interrupt | |
| 418 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 419 mov r0,sp | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
420 bl cyg_hal_report_abort_prefetch |
| 2 | 421 #endif |
| 422 mov v1,#CYGNUM_HAL_EXCEPTION_CODE_ACCESS | |
| 423 b call_exception_handler | |
| 424 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
425 .code 32 |
| 2 | 426 abort_data: |
| 427 ldr sp,.__undef_exception_stack // get good stack | |
| 428 sub lr,lr,#4 // PC at time of interrupt | |
| 429 stmfd sp!,{r0,fp,ip,lr} | |
| 430 mrs r0,spsr | |
| 431 stmfd sp!,{r0} | |
| 432 mov ip,sp // save SP which will vanish with | |
| 433 // mode switch | |
| 434 mrs r0,cpsr // switch to Supervisor Mode | |
| 435 bic r0,r0,#CPSR_MODE_BITS | |
| 436 orr r0,r0,#CPSR_SUPERVISOR_MODE | |
| 437 msr cpsr,r0 // sp,lr are now old values | |
| 438 mov fp,sp | |
| 439 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 440 ldr sp,.__GDB_stack | |
| 441 cmp fp,sp // already on GDB stack? | |
| 442 bhi 10f | |
| 443 ldr r0,.__GDB_stack_base | |
| 444 cmp fp,r0 | |
| 445 bls 10f // no - switch to GDB stack | |
| 446 // (already in sp) | |
| 447 mov sp,fp // yes - no switch | |
| 448 10: | |
| 449 #endif | |
| 450 sub sp,sp,#ARMREG_SIZE // make space for frame | |
| 451 stmea sp,{r0-r10,fp} // save immediately visible registers | |
| 452 ldmfd ip,{r0-r4} // saved registers | |
| 453 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt | |
| 454 str r1,[sp,#armreg_r0] // saved R0 | |
| 455 str r2,[sp,#armreg_fp] // saved FP | |
| 456 str r3,[sp,#armreg_ip] // saved IP | |
| 457 str r4,[sp,#armreg_pc] // PC at time of interrupt | |
| 458 str lr,[sp,#armreg_lr] // LR at time of interrupt | |
| 459 add r0,ip,#ARMREG_SIZE | |
| 460 str fp,[sp,#armreg_sp] // SP at time of interrupt | |
| 461 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 462 mov r0,sp | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
463 bl cyg_hal_report_abort_data |
| 2 | 464 #endif |
| 465 mov v1,#CYGNUM_HAL_EXCEPTION_DATA_ACCESS | |
| 466 b call_exception_handler | |
| 467 | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
468 |
| 2 | 469 // |
| 470 // Dispatch an exception handler. | |
| 471 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
472 .code 32 |
| 2 | 473 call_exception_handler: |
| 474 str v1,[sp,#armreg_vector] | |
| 475 mov r0,sp | |
| 476 bl exception_handler | |
| 477 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS | |
| 478 mov r0,sp | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
479 bl cyg_hal_report_exception_handler_returned |
| 2 | 480 #endif |
| 481 | |
| 482 // Restore [interrupted] context | |
| 483 mov ip,sp // get stack pointer | |
| 484 | |
| 485 ldr lr,[ip,#armreg_lr] | |
| 486 ldr sp,[sp,#armreg_sp] | |
| 487 | |
| 488 mrs r0,cpsr // move back to IRQ mode | |
|
38
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
489 orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
490 msr cpsr,r0 |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
491 nop |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
492 nop |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
493 |
|
40
a3cc6665b684
Merge from eCos master repository on 1999-10-01-07:47:04-BST
jlarmour
parents:
38
diff
changeset
|
494 bic r0,r0,#CPSR_MODE_BITS |
|
38
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
495 orr r0,r0,#CPSR_IRQ_MODE |
| 2 | 496 msr cpsr,r0 |
| 497 | |
| 498 mov sp,ip | |
| 499 ldr lr,[sp,#armreg_pc] | |
| 500 ldr r0,[sp,#armreg_cpsr] | |
| 501 ldr ip,[sp,#armreg_ip] | |
| 502 msr spsr,r0 | |
| 503 ldmfd sp,{r0-r10,fp} | |
| 504 | |
| 505 movs pc,lr // restore PC from LR, CPSR from SPSR | |
| 506 | |
| 507 // Handle device interrupts | |
| 508 // This is slightly more complicated than the other exception handlers because | |
| 509 // it needs to interface with the kernel (if present). | |
| 510 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
511 .code 32 |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
512 FIQ: |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
513 // Note: I use this exception stack while saving the context because |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
514 // the current SP does not seem to be always valid in this CPU mode. |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
515 ldr sp,.__FIQ_exception_stack // get good stack |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
516 sub lr,lr,#4 // PC at time of interrupt |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
517 stmfd sp!,{r0,fp,ip,lr} |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
518 mrs r0,spsr |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
519 stmfd sp!,{r0} |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
520 b handle_IRQ_or_FIQ |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
521 |
| 2 | 522 IRQ: |
| 523 // Note: I use this exception stack while saving the context because | |
| 524 // the current SP does not seem to be always valid in this CPU mode. | |
| 525 ldr sp,.__exception_stack // get good stack | |
| 526 sub lr,lr,#4 // PC at time of interrupt | |
| 527 stmfd sp!,{r0,fp,ip,lr} | |
| 528 mrs r0,spsr | |
| 529 stmfd sp!,{r0} | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
530 |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
531 handle_IRQ_or_FIQ: |
| 2 | 532 mov ip,sp // save SP which will vanish with |
| 533 // mode switch | |
| 534 mrs r0,cpsr // switch to Supervisor Mode | |
| 535 bic r0,r0,#CPSR_MODE_BITS | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
536 orr r0,r0,#CPSR_SUPERVISOR_MODE|CPSR_FIQ_DISABLE|CPSR_IRQ_DISABLE |
| 2 | 537 msr cpsr,r0 // sp,lr are now old values |
| 538 mov fp,sp // save old SP | |
| 539 sub sp,sp,#ARMREG_SIZE // make space for frame | |
| 540 stmea sp,{r0-r10,fp} // save immediately visible registers | |
| 541 ldmfd ip,{r0-r4} // saved registers | |
| 542 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt | |
| 543 str r1,[sp,#armreg_r0] // saved R0 | |
| 544 str r2,[sp,#armreg_fp] // saved FP | |
| 545 str r3,[sp,#armreg_ip] // saved IP | |
| 546 str r4,[sp,#armreg_pc] // PC at time of interrupt | |
| 547 str lr,[sp,#armreg_lr] // LR at time of interrupt | |
| 548 str fp,[sp,#armreg_sp] // SP at time of interrupt | |
| 549 mov v6,sp // Save pointer to register frame | |
| 550 | |
| 551 // mov r0,sp | |
| 552 // bl _show_frame_in | |
| 553 | |
| 554 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
| 555 // Switch to interrupt stack | |
| 556 ldr r2,.irq_level // current number of nested interrupts | |
| 557 ldr r0,[r2] | |
| 558 add r1,r0,#1 | |
| 559 str r1,[r2] // if was zero, switch stacks | |
| 560 cmp r0,#0 | |
| 561 moveq r1,sp // save old stack pointer | |
| 562 ldreq sp,.__interrupt_stack | |
| 563 stmeqfd sp!,{r1} | |
| 564 10: | |
| 565 #endif | |
| 566 | |
| 567 // The entire CPU state is now stashed on the stack, | |
| 568 // increment the scheduler lock and handle the interrupt | |
| 569 | |
| 570 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT | |
| 571 .extern cyg_scheduler_sched_lock | |
| 572 ldr r3,.cyg_scheduler_sched_lock | |
| 573 ldr r4,[r3] | |
| 574 add r4,r4,#1 | |
| 575 str r4,[r3] | |
| 576 #endif | |
| 577 | |
|
14
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
578 // TEMP |
|
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
579 mov r0,v6 |
|
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
580 // TEMP |
| 2 | 581 bl hal_IRQ_handler // determine interrupt source |
| 582 mov v1,r0 // returned vector # | |
| 583 | |
| 584 #if defined(CYGPKG_KERNEL_INSTRUMENT) && \ | |
| 585 defined(CYGDBG_KERNEL_INSTRUMENT_INTR) | |
| 586 ldr r0,=RAISE_INTR // arg0 = type = INTR,RAISE | |
| 587 mov r1,v1 // arg1 = vector | |
| 588 mov r2,#0 // arg2 = 0 | |
| 589 bl cyg_instrument // call instrument function | |
| 590 #endif | |
| 591 | |
| 592 mov r0,v1 // vector # | |
|
38
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
593 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
594 cmp r0,#0 // ignore spurious interrupts |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
595 beq spurious_IRQ |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
596 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS |
| 2 | 597 ldr r1,.hal_interrupt_data |
| 598 ldr r1,[r1,v1,lsl #2] // handler data | |
| 599 ldr r2,.hal_interrupt_handlers | |
| 600 ldr v3,[r2,v1,lsl #2] // handler (indexed by vector #) | |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
601 mov r2,v6 // register frame (this is necessary |
|
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
602 // for the ISR too, for ^C detection) |
| 2 | 603 |
| 604 mov lr,pc // invoke handler (call indirect | |
| 605 mov pc,v3 // thru v3) | |
| 606 | |
|
38
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
607 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
608 spurious_IRQ: |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
609 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
610 |
| 2 | 611 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK |
| 612 // If we are returning from the last nested interrupt, move back | |
| 613 // to the thread stack. interrupt_end() must be called on the | |
| 614 // thread stack since it potentially causes a context switch. | |
| 615 ldr r2,.irq_level | |
| 616 ldr r3,[r2] | |
| 617 subs r1,r3,#1 | |
| 618 str r1,[r2] | |
| 619 ldreq sp,[sp] // This should be the saved stack pointer | |
| 620 #endif | |
| 621 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT | |
| 622 // The return value from the handler (in r0) will indicate whether a | |
| 623 // DSR is to be posted. Pass this together with a pointer to the | |
| 624 // interrupt object we have just used to the interrupt tidy up routine. | |
| 625 | |
| 626 ldr r1,.hal_interrupt_objects | |
| 627 ldr r1,[r1,v1,lsl #2] | |
|
28
18ee5a9c102e
Merge from eCos master repository on 1999-08-09-17:04:48-BST
jlarmour
parents:
26
diff
changeset
|
628 mov r2,v6 // register frame |
| 2 | 629 bl interrupt_end // post any bottom layer handler |
| 630 // threads and call scheduler | |
| 631 #endif | |
| 632 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
633 |
| 2 | 634 // mov r0,sp |
| 635 // bl show_frame_out | |
| 636 | |
| 637 mov ip,sp // get stack pointer | |
| 638 | |
| 639 ldr lr,[ip,#armreg_lr] | |
| 640 ldr sp,[sp,#armreg_sp] | |
| 641 | |
| 642 mrs r0,cpsr // move back to IRQ mode | |
|
38
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
643 orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
644 msr cpsr,r0 |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
645 nop |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
646 nop |
|
e7ba79f6d3a8
Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents:
36
diff
changeset
|
647 |
| 2 | 648 bic r0,r0,#CPSR_MODE_BITS |
| 649 orr r0,r0,#CPSR_IRQ_MODE | |
| 650 msr cpsr,r0 | |
| 651 | |
| 652 mov sp,ip | |
| 653 ldr lr,[sp,#armreg_pc] | |
| 654 ldr r0,[sp,#armreg_cpsr] | |
| 655 ldr ip,[sp,#armreg_ip] | |
| 656 msr spsr,r0 | |
| 657 ldmfd sp,{r0-r10,fp} | |
| 658 movs pc,lr // restore PC from LR, CPSR from SPSR | |
| 659 | |
| 660 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
| 661 // Execute pending DSRs the interrupt stack | |
| 662 // Note: this can only be called from code running on a thread stack | |
| 663 .global hal_interrupt_stack_call_pending_DSRs | |
| 664 hal_interrupt_stack_call_pending_DSRs: | |
| 665 stmfd sp!,{r4,r5,lr} | |
| 666 // Disable interrupts | |
| 667 mrs r4,cpsr // disable IRQ's | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
668 orr r2,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
669 bic r5,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE |
| 2 | 670 msr cpsr,r2 |
| 671 // Switch to interrupt stack | |
| 672 mov r3,sp // save old stack pointer | |
| 673 ldr sp,.__interrupt_stack | |
| 674 stmfd sp!,{r3} // stored at top of interrupt stack | |
| 675 ldr r2,.irq_level // current number of nested interrupts | |
| 676 ldr r3,[r2] | |
| 677 add r3,r3,#1 // bump nesting level | |
| 678 str r3,[r2] | |
| 679 msr cpsr,r5 // enable interrupts | |
| 680 | |
| 681 bl cyg_interrupt_call_pending_DSRs | |
| 682 | |
| 683 // Disable interrupts | |
| 684 mrs r1,cpsr // disable IRQ's | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
685 orr r2,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE |
| 2 | 686 msr cpsr,r2 |
| 687 | |
| 688 // Move back to the thread stack. | |
| 689 ldr r2,.irq_level | |
| 690 ldr r3,[r2] | |
| 691 sub r3,r3,#1 // decrement nesting level | |
| 692 str r3,[r2] | |
| 693 ldr sp,[sp] // This should be the saved stack pointer | |
| 694 msr cpsr,r4 // restore interrupts to original state | |
| 695 | |
| 696 ldmfd sp!,{r4,r5,pc} // return | |
| 697 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
|
14
01ce82f3e11a
Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents:
10
diff
changeset
|
698 |
| 2 | 699 |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
700 // Dummy/support functions |
| 2 | 701 |
| 702 .global __gccmain | |
|
34
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
703 .global _psr |
|
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
704 .global _sp |
|
29bc183297e1
Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents:
28
diff
changeset
|
705 |
| 2 | 706 __gccmain: |
| 707 mov pc,lr | |
| 708 | |
| 709 _psr: | |
| 710 mrs r0,cpsr | |
| 711 mov pc,lr | |
| 712 | |
| 713 _sp: | |
| 714 mov r0,sp | |
| 715 mov pc,lr | |
| 716 | |
| 717 | |
| 718 // | |
| 719 // Pointers to various objects. | |
| 720 // | |
| 721 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 722 PTR(__GDB_stack_base) | |
| 723 PTR(__GDB_stack) | |
| 724 #endif | |
| 725 PTR(__startup_stack) | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
726 PTR(__FIQ_exception_stack) |
| 2 | 727 PTR(__exception_stack) |
| 728 PTR(__undef_exception_stack) | |
| 729 PTR(__bss_start) | |
| 730 PTR(__bss_end) | |
| 731 PTR(_end) | |
| 732 PTR(__rom_data_start) | |
| 733 PTR(__ram_data_start) | |
| 734 PTR(__ram_data_end) | |
| 735 PTR(hal_interrupt_handlers) | |
| 736 PTR(hal_interrupt_data) | |
| 737 PTR(hal_interrupt_objects) | |
| 738 PTR(__exception_handlers) | |
| 739 PTR(init_flag) | |
| 740 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT | |
| 741 PTR(cyg_scheduler_sched_lock) | |
| 742 #endif | |
| 743 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
| 744 PTR(irq_level) | |
| 745 PTR(__interrupt_stack) | |
| 746 #endif | |
| 747 | |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
748 // |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
749 // Identification - useful to find out when a system was configured |
|
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
750 _eCos_id: |
|
28
18ee5a9c102e
Merge from eCos master repository on 1999-08-09-17:04:48-BST
jlarmour
parents:
26
diff
changeset
|
751 .asciz "eCos : " __DATE__ |
|
10
d3fbcdfa1b2f
Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents:
8
diff
changeset
|
752 |
| 2 | 753 |
| 754 // ------------------------------------------------------------------------- | |
| 755 // Interrupt vector tables. | |
| 756 // These tables contain the isr, data and object pointers used to deliver | |
| 757 // interrupts to user code. | |
|
24
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
758 |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
759 // Despite appearances, their sizes are not #defines, but .equ symbols |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
760 // generated by magic without proper dependencies in arm.inc |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
761 // Recompiling will not DTRT without manual intervention. |
|
306eee292492
Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents:
20
diff
changeset
|
762 |
| 2 | 763 .data |
| 764 | |
| 765 init_flag: | |
| 766 .long 0 | |
| 767 | |
| 768 .extern hal_default_isr | |
| 769 | |
| 770 .globl hal_interrupt_handlers | |
| 771 hal_interrupt_handlers: | |
| 772 .rept CYGNUM_HAL_ISR_COUNT | |
| 773 .long hal_default_isr | |
| 774 .endr | |
| 775 | |
| 776 .globl hal_interrupt_data | |
| 777 hal_interrupt_data: | |
| 778 .rept CYGNUM_HAL_ISR_COUNT | |
| 779 .long 0 | |
| 780 .endr | |
| 781 | |
| 782 .globl hal_interrupt_objects | |
| 783 hal_interrupt_objects: | |
| 784 .rept CYGNUM_HAL_ISR_COUNT | |
| 785 .long 0 | |
| 786 .endr | |
| 787 | |
| 788 // ------------------------------------------------------------------------- | |
| 789 // Temporary interrupt stack | |
| 790 | |
| 791 .section ".bss" | |
| 792 | |
| 793 // Small stacks, only used for saving information between CPU modes | |
| 794 __exception_stack_base: | |
| 795 .rept 32 | |
| 796 .long 0 | |
| 797 .endr | |
|
20
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
798 __FIQ_exception_stack: |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
799 .rept 32 |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
800 .long 0 |
|
5f5102441818
Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents:
16
diff
changeset
|
801 .endr |
| 2 | 802 __exception_stack: |
| 803 .rept 32 | |
| 804 .long 0 | |
| 805 .endr | |
| 806 __undef_exception_stack: | |
| 807 | |
| 808 // Runtime stack used during all interrupt processing | |
| 809 #ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE | |
| 810 #define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 | |
| 811 #endif | |
| 812 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
| 813 .balign 16 | |
|
8
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
814 .global cyg_interrupt_stack_base |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
815 cyg_interrupt_stack_base: |
| 2 | 816 __interrupt_stack_base: |
| 817 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE | |
| 818 .byte 0 | |
| 819 .endr | |
| 820 .balign 16 | |
|
8
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
821 .global cyg_interrupt_stack |
|
ece80412419a
Merge from eCos master repository on 1999-05-21-22:05:54-BST
jlarmour
parents:
6
diff
changeset
|
822 cyg_interrupt_stack: |
| 2 | 823 __interrupt_stack: |
| 824 irq_level: | |
| 825 .long 0 | |
| 826 #endif | |
| 827 | |
| 828 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS | |
| 829 .balign 16 | |
| 830 __GDB_stack_base: | |
| 831 .rept 0x400 | |
| 832 .byte 0 | |
| 833 .endr | |
| 834 __GDB_stack: | |
| 835 #endif | |
| 836 .balign 16 | |
| 837 __startup_stack_base: | |
| 838 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK | |
| 839 .rept 512 | |
| 840 #else | |
| 841 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE | |
| 842 #endif | |
| 843 .byte 0 | |
| 844 .endr | |
| 845 .balign 16 | |
| 846 __startup_stack: | |
| 847 | |
| 848 // -------------------------------------------------------------------------- | |
| 849 // end of vectors.S |