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annotate packages/hal/mips/ref4955/current/include/platform.inc @ 134:d2f49caf9e38 ecos-sw-2000-11-03

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Merge from eCos master repository on 2000-11-03-09:00:49-GMT
author jlarmour
date Fri, 03 Nov 2000 21:17:40 +0000
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children e0c0827131d1
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1 #ifndef CYGONCE_HAL_PLATFORM_INC
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2 #define CYGONCE_HAL_PLATFORM_INC
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3 ##=============================================================================
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4 ##
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5 ## platform.inc
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6 ##
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7 ## REF4955/TX4955 board assembler header file
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8 ##
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9 ##=============================================================================
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10 #####COPYRIGHTBEGIN####
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11 #
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12 # -------------------------------------------
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13 # The contents of this file are subject to the Red Hat eCos Public License
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14 # Version 1.1 (the "License"); you may not use this file except in
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15 # compliance with the License. You may obtain a copy of the License at
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16 # http://www.redhat.com/
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17 #
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18 # Software distributed under the License is distributed on an "AS IS"
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19 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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20 # License for the specific language governing rights and limitations under
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21 # the License.
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22 #
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23 # The Original Code is eCos - Embedded Configurable Operating System,
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24 # released September 30, 1998.
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25 #
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26 # The Initial Developer of the Original Code is Red Hat.
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27 # Portions created by Red Hat are
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28 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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29 # All Rights Reserved.
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30 # -------------------------------------------
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31 #
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32 #####COPYRIGHTEND####
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33 ##=============================================================================
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34 #######DESCRIPTIONBEGIN####
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35 ##
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36 ## Author(s): nickg
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37 ## Contributors:nickg,jskov
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38 ## Date: 2000-05-15
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39 ## Purpose: REF4955/TX4955 board definitions.
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40 ## Description: This file contains various definitions and macros that are
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41 ## useful for writing assembly code for the REF4955/TX4955 board.
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42 ## Usage:
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43 ## #include <cyg/hal/platform.inc>
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44 ## ...
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45 ##
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46 ##
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47 ######DESCRIPTIONEND####
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48 ##
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49 ##=============================================================================
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50
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51 #include <cyg/hal/mips.inc>
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52 #include <cyg/hal/plf_defs.inc>
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53
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54
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55 #------------------------------------------------------------------------------
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56 # Macro for copying vectors to RAM if necessary.
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57 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR)
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58
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59 .macro hal_vectors_init
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60 # If we don~t play nice with a ROM monitor, copy the required
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61 # vectors into the proper location.
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62 la t0,0x80000000 # dest addr
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63 la t1,utlb_vector # source addr
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64 la t3,utlb_vector_end # end dest addr
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65 1:
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66 lw v0,0(t1) # get word
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67 addi t1,t1,4
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68 sw v0,0(t0) # write word
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69 addi t0,t0,4
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70 bne t1,t3,1b
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71 nop
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72
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73 la t0,0x80000180 # dest addr
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74 la t1,other_vector # source addr
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75 la t3,other_vector_end # end dest addr
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76 1:
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77 lw v0,0(t1) # get word
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78 addi t1,t1,4
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79 sw v0,0(t0) # write word
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80 addi t0,t0,4
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81 bne t1,t3,1b
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82 nop
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83
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84 .set mips3 # Set ISA to MIPS 3 to allow cache insns
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85 # Now clear the region in the caches
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86 la t0,0x80000000 # dest addr
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87 ori t1,t0,0x200 # source addr
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88 1: cache 0x01,0(t0) # Flush word from data cache
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89 cache 0x01,1(t0)
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90 cache 0x01,2(t0)
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91 cache 0x01,3(t0)
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92 nop
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93 cache 0x00,0(t0) # Invalidate icache for word
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94 cache 0x00,1(t0)
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95 cache 0x00,2(t0)
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96 cache 0x00,3(t0)
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97 nop
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98 addi t0,t0,0x20
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99 bne t0,t1,1b
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100 nop
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101 .set mips0 # reset ISA to default
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102
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103 .endm
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104
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105 #else
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106
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107 .macro hal_vectors_init
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108 .endm
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109
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110 #endif
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111
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112 #------------------------------------------------------------------------------
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113 # Monitor initialization.
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114
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115 #ifndef CYGPKG_HAL_MIPS_MON_DEFINED
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116
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117 #if defined(CYG_HAL_STARTUP_ROM) || \
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118 ( defined(CYG_HAL_STARTUP_RAM) && \
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119 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
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120
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121 # If we are starting up from ROM, or we are starting in
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122 # RAM and NOT using a ROM monitor, initialize the VSR table.
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123
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124 .macro hal_mon_init
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125 hal_vectors_init
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126 # Set default exception VSR for all vectors
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127 ori a0,zero,CYGNUM_HAL_VSR_COUNT
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128 la a1,__default_exception_vsr
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129 la a2,hal_vsr_table
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130 1: sw a1,0(a2)
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131 addi a2,a2,4
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132 addi a0,a0,-1
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133 bne a0,zero,1b
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134 nop
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135
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136 # Now set special VSRs
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137 la a0,hal_vsr_table
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138 # Set interrupt VSR
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139 la a1,__default_interrupt_vsr
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140 sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
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141 # Add special handler on breakpoint vector to allow GDB and
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142 # GCC to both use 'break' without conflicts.
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143 la a1,__break_vsr_springboard
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144 sw a1,CYGNUM_HAL_VECTOR_BREAKPOINT*4(a0)
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145 # Set exception handler on special vectors
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146 # FIXME: Should use proper definitions
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147 la a1,__default_exception_vsr
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148 sw a1,32*4(a0) # debug
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149 sw a1,33*4(a0) # utlb
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150 sw a1,34*4(a0) # nmi
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151 .endm
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152
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153 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
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154
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155 # Initialize the VSR table entries
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156 # We only take control of the interrupt vector,
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157 # the rest are left to the ROM for now...
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158
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159 .macro hal_mon_init
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160 hal_vectors_init
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161 # Set interrupt VSR
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162 la a0,hal_vsr_table
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163 la a1,__default_interrupt_vsr
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164 sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
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165 .endm
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166
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167 #else
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168
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169 .macro hal_mon_init
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170 hal_vectors_init
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171 .endm
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172
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173 #endif
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174
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175 #define CYGPKG_HAL_MIPS_MON_DEFINED
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176 #endif
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177
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178 #------------------------------------------------------------------------------
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179
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180 #if !defined(CYG_HAL_STARTUP_RAM)
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181 .macro hal_memc_init
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182 // Only initialize the SDRAM controller when running in ROM
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183 .extern hal_memc_setup
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184 lar t0,hal_memc_setup
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185 jalr t0
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186 nop
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187 .endm
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188 #define CYGPKG_HAL_MIPS_MEMC_DEFINED
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189 #endif
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190
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191 #------------------------------------------------------------------------------
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192 # Decide whether the VSR table is defined externally, or is to be defined
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193 # here.
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194
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195 ## ISR tables are defined in platform.S
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196 #define CYG_HAL_MIPS_ISR_TABLES_DEFINED
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197
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198 ## VSR table is at a fixed RAM address defined by the linker script
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199 #define CYG_HAL_MIPS_VSR_TABLE_DEFINED
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200
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201 ##-----------------------------------------------------------------------------
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202 ## For chaining, use the calculated cause vector number.
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203
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204 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
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205 .macro hal_intc_translate inum,vnum
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206 move \vnum,\inum # Vector == interrupt number
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207 .endm
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208 #define CYGPKG_HAL_MIPS_INTC_TRANSLATE_DEFINED
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209 #endif
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210
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211 ##-----------------------------------------------------------------------------
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212 #ifdef CYG_STARTUP_ROM
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213
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214 ## Initial SR value for use in ROM:
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215 ## CP0 usable
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216 ## Vectors in RAM
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217 ## FP registers are 32 bit
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218 ## All hw ints disabled
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219 #define INITIAL_SR 0x30000000
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220
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221 #else
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222
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223 ## Initial SR value for use standalone:
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224 ## CP0 usable
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225 ## Vectors to RAM
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226 ## FP registers are 32 bit
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227 ## All hw ints disabled
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228 #define INITIAL_SR 0x30000000
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229
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230 #endif
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231
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232 #------------------------------------------------------------------------------
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233 #endif // ifndef CYGONCE_HAL_PLATFORM_INC
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234 # end of platform.inc