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annotate packages/hal/sh/sh3/current/include/sh3_sci.h @ 134:d2f49caf9e38 ecos-sw-2000-11-03

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Merge from eCos master repository on 2000-11-03-09:00:49-GMT
author jlarmour
date Fri, 03 Nov 2000 21:17:40 +0000
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children 25e238959bae
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1 //=============================================================================
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2 //
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3 // sh3_sci.h
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4 //
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5 // Simple driver for the SH Serial Communication Interface (SCI)
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6 //
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7 //=============================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //=============================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): jskov
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35 // Contributors:jskov
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36 // Date: 1999-05-17
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37 //
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38 //####DESCRIPTIONEND####
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39 //
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40 //=============================================================================
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41
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42 #include <pkgconf/hal.h>
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43
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44 #ifdef CYGNUM_HAL_SH_SH3_SCI_PORTS
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45
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46 //--------------------------------------------------------------------------
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47 // SCI register offsets
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48 #if (CYGARC_SH_MOD_SCI >= 2)
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49 # define _REG_SCSPTR -0x4 // serial port register
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50 #endif
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51 #define _REG_SCSMR 0x0 // serial mode register
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52 #define _REG_SCBRR 0x2 // bit rate register
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53 #define _REG_SCSCR 0x4 // serial control register
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54 #define _REG_SCTDR 0x6 // transmit data register
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55 #define _REG_SCSSR 0x8 // serial status register
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56 #define _REG_SCRDR 0xa // receive data register
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57
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58 //--------------------------------------------------------------------------
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59
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60 typedef struct {
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61 cyg_uint8* base;
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62 cyg_int32 msec_timeout;
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63 int isr_vector;
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64 } channel_data_t;
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65
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66 //--------------------------------------------------------------------------
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67
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68 #if !defined(CYGSEM_HAL_VIRTUAL_VECTOR_DIAG)
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69 // This one should only be used by old-stub compatibility code!
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70 externC void cyg_hal_plf_sci_init_channel(const channel_data_t* chan);
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71 #endif
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72
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73 externC cyg_uint8 cyg_hal_plf_sci_getc(void* __ch_data);
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74 externC void cyg_hal_plf_sci_putc(void* __ch_data, cyg_uint8 c);
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75 externC void cyg_hal_plf_sci_init(int sci_index, int comm_index,
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76 int rcv_vect, cyg_uint8* base);
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77
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78
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79 #endif // CYGNUM_HAL_SH_SH3_SCI_PORTS
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80 //-----------------------------------------------------------------------------
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81 // end of sh3_sci.h