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Merge from eCos master repository on 2002-05-20-20:11:54-BST
author jlarmour
date Mon, 20 May 2002 22:19:26 +0000
parents d2f49caf9e38
children d2c90368aeef
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1 //==========================================================================
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2 //
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3 // plf_misc.c
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4 //
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5 // HAL platform miscellaneous functions
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6 //
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7 //==========================================================================
208
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8 //####ECOSGPLCOPYRIGHTBEGIN####
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9 // -------------------------------------------
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10 // This file is part of eCos, the Embedded Configurable Operating System.
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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12 //
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13 // eCos is free software; you can redistribute it and/or modify it under
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14 // the terms of the GNU General Public License as published by the Free
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15 // Software Foundation; either version 2 or (at your option) any later version.
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16 //
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17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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20 // for more details.
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21 //
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22 // You should have received a copy of the GNU General Public License along
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23 // with eCos; if not, write to the Free Software Foundation, Inc.,
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 //
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26 // As a special exception, if other files instantiate templates or use macros
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27 // or inline functions from this file, or you compile this file and link it
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28 // with other works to produce a work based on this file, this file does not
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29 // by itself cause the resulting work to be covered by the GNU General Public
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30 // License. However the source code for this file must still be made available
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31 // in accordance with section (3) of the GNU General Public License.
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32 //
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33 // This exception does not invalidate any other reasons why a work based on
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34 // this file might be covered by the GNU General Public License.
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35 //
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36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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37 // at http://sources.redhat.com/ecos/ecos-license
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38 // -------------------------------------------
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39 //####ECOSGPLCOPYRIGHTEND####
134
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40 //==========================================================================
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41 //#####DESCRIPTIONBEGIN####
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42 //
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43 // Author(s): nickg
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44 // Contributors: nickg, jlarmour, jskov
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45 // Date: 2000-05-15
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46 // Purpose: HAL miscellaneous functions
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47 // Description: This file contains miscellaneous functions provided by the
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48 // HAL.
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49 //
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50 //####DESCRIPTIONEND####
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51 //
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52 //==========================================================================
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53
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54 #include <pkgconf/hal.h>
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55
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56 #include <cyg/infra/cyg_type.h> // Base types
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57 #include <cyg/infra/cyg_trac.h> // tracing macros
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58 #include <cyg/infra/cyg_ass.h> // assertion macros
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59
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60 #include <cyg/hal/hal_arch.h> // architectural definitions
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61
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62 #include <cyg/hal/hal_intr.h> // Interrupt handling
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63
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64 #include <cyg/hal/hal_cache.h> // Cache handling
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65 #include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
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66
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67 #include <cyg/hal/hal_if.h> // Calling interface definitions
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68 #include <cyg/hal/hal_misc.h> // Helper functions
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69
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70 //--------------------------------------------------------------------------
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71
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72 #define CYGARC_REG_SUPERIO_IREG 0xb4000398
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73 #define CYGARC_REG_SUPERIO_DREG 0xb4000399
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74
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75 #define CYGARC_REG_SUPERIO_FER 0x00 // function enable
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76 #define CYGARC_REG_SUPERIO_FAR 0x01 // function address
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77 #define CYGARC_REG_SUPERIO_PTR 0x02 // power and test
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78 #define CYGARC_REG_SUPERIO_CLK 0x51 // clock controller
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79
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80
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81 #define CYGARC_REG_SUPERIO_FER_PAR 0x01
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82 #define CYGARC_REG_SUPERIO_FER_SCC1 0x02
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83 #define CYGARC_REG_SUPERIO_FER_SCC2 0x04
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84
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85 #define CYGARC_REG_SUPERIO_CLK_14M 0x00 // 14MHz source
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86 #define CYGARC_REG_SUPERIO_CLK_CME 0x04 // clock multiplier enabled
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87
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88 #define CYGARC_REG_SUPERIO_PTR_PPEXT 0x80 // extended
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89
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90
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91
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92
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93 static void write_super_io(cyg_uint8 offset, cyg_uint8 data)
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94 {
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95 HAL_WRITE_UINT8(CYGARC_REG_SUPERIO_IREG, offset);
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96 HAL_WRITE_UINT8(CYGARC_REG_SUPERIO_DREG, data);
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97 HAL_WRITE_UINT8(CYGARC_REG_SUPERIO_DREG, data);
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98 }
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99
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100 void hal_platform_init(void)
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101 {
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102 hal_if_init();
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103
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104 // Configure the SuperIO chip
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105 write_super_io(CYGARC_REG_SUPERIO_FER,
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106 CYGARC_REG_SUPERIO_FER_SCC1|CYGARC_REG_SUPERIO_FER_SCC2);
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107 write_super_io(CYGARC_REG_SUPERIO_FAR, 0x10);
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108 write_super_io(CYGARC_REG_SUPERIO_CLK,
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109 CYGARC_REG_SUPERIO_CLK_14M|CYGARC_REG_SUPERIO_CLK_CME);
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110
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111 // Set up VSC320 interrupt controller. INT1 must merge INT2 and
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112 // INT3 according to the platform specification.
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113 HAL_WRITE_UINT32(CYGARC_REG_INT_CFG1,
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114 CYGARC_REG_INT_CFG_INT2|CYGARC_REG_INT_CFG_INT3);
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115
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116 // Unmask vectors which are entry points for interrupt controllers
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117 HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_V320USC_INT0);
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118 HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_V320USC_INT1);
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119 HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_IO);
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120 }
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121
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122 //--------------------------------------------------------------------------
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123 // End of plf_misc.c