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annotate packages/hal/sh/sh3/current/src/var_misc.c @ 3292:7f8e529b4d82 default tip

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Fix FREESCALE_EDMA_NBYTES_MLOFFYES_MLOFF() so it works with negative offsets.
author vae
date Wed, 29 Apr 2015 23:31:48 +0000
parents 74dbf4c3f2e1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 //==========================================================================
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2 //
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3 // var_misc.c
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4 //
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5 // HAL miscellaneous functions
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6 //
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7 //==========================================================================
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8 // ####ECOSGPLCOPYRIGHTBEGIN####
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9 // -------------------------------------------
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10 // This file is part of eCos, the Embedded Configurable Operating System.
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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12 //
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13 // eCos is free software; you can redistribute it and/or modify it under
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14 // the terms of the GNU General Public License as published by the Free
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15 // Software Foundation; either version 2 or (at your option) any later
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16 // version.
208
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17 //
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18 // eCos is distributed in the hope that it will be useful, but WITHOUT
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19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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21 // for more details.
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22 //
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23 // You should have received a copy of the GNU General Public License
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24 // along with eCos; if not, write to the Free Software Foundation, Inc.,
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25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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26 //
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27 // As a special exception, if other files instantiate templates or use
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28 // macros or inline functions from this file, or you compile this file
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29 // and link it with other works to produce a work based on this file,
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30 // this file does not by itself cause the resulting work to be covered by
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31 // the GNU General Public License. However the source code for this file
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32 // must still be made available in accordance with section (3) of the GNU
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33 // General Public License v2.
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34 //
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35 // This exception does not invalidate any other reasons why a work based
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36 // on this file might be covered by the GNU General Public License.
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37 // -------------------------------------------
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38 // ####ECOSGPLCOPYRIGHTEND####
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39 //==========================================================================
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40 //#####DESCRIPTIONBEGIN####
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41 //
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42 // Author(s): jskov
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43 // Contributors: jskov, jlarmour, nickg
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44 // Date: 1999-04-03
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45 // Purpose: HAL miscellaneous functions
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46 // Description: This file contains miscellaneous functions provided by the
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47 // HAL.
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48 //
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49 //####DESCRIPTIONEND####
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50 //
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51 //===========================================================================
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52
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53 #include <pkgconf/hal.h>
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54
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55 #include <cyg/infra/cyg_type.h>
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56 #include <cyg/infra/cyg_trac.h> // tracing macros
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57 #include <cyg/infra/cyg_ass.h> // assertion macros
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58 #include <cyg/infra/diag.h> // diag_printf
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59
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60 #include <cyg/hal/hal_arch.h> // HAL header
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61 #include <cyg/hal/hal_cache.h> // HAL cache
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62 #include <cyg/hal/hal_intr.h> // HAL interrupts/exceptions
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63
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64 //---------------------------------------------------------------------------
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65 // Initial cache enabling
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66
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67 #ifdef CYGHWR_HAL_SH_CACHE_MODE_P0_WRITE_BACK
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68 # define CACHE_MODE_P0 0
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69 #else
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70 # define CACHE_MODE_P0 CYGARC_REG_CCR_WT
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71 #endif
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72
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73 #ifdef CYGHWR_HAL_SH_CACHE_MODE_P1_WRITE_BACK
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74 # define CACHE_MODE_P1 CYGARC_REG_CCR_CB
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75 #else
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76 # define CACHE_MODE_P1 0
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77 #endif
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78
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79 externC void
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80 cyg_var_enable_caches(void)
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81 {
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82 // If relying on a ROM monitor do not invalidate the caches as the
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83 // ROM monitor may have (non-synced) state in the caches.
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84 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR)
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85 // Initialize cache.
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86 HAL_UCACHE_INVALIDATE_ALL();
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87
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88 // Set cache modes
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89 HAL_UCACHE_WRITE_MODE_SH(CACHE_MODE_P0|CACHE_MODE_P1);
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90 #endif
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91 #ifdef CYGHWR_HAL_SH_CACHE_ENABLE
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92 // Enable cache.
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93 HAL_UCACHE_ENABLE();
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94 #endif
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95 }
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96
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97 //---------------------------------------------------------------------------
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98 void
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99 hal_variant_init(void)
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100 {
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101 }
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102
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103 //---------------------------------------------------------------------------
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104 // Interrupt function support
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105
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106 externC cyg_uint8 cyg_hal_ILVL_table[];
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107 externC cyg_uint8 cyg_hal_IMASK_table[];
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108
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109 static void
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110 hal_interrupt_update_level(int vector)
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111 {
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112 cyg_uint16 iprX;
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113 int level;
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114
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115 level = cyg_hal_IMASK_table[vector] ? cyg_hal_ILVL_table[vector] : 0;
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116
134
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117 switch( (vector) ) {
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118 /* IPRA */
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119 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0:
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120 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX);
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121 iprX &= ~CYGARC_REG_IPRA_TMU0_MASK;
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122 iprX |= (level)*CYGARC_REG_IPRA_TMU0_PRI1;
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123 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX);
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124 break;
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125 case CYGNUM_HAL_INTERRUPT_TMU1_TUNI1:
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126 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX);
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127 iprX &= ~CYGARC_REG_IPRA_TMU1_MASK;
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128 iprX |= (level)*CYGARC_REG_IPRA_TMU1_PRI1;
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129 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX);
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130 break;
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131 case CYGNUM_HAL_INTERRUPT_TMU2_TUNI2:
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132 case CYGNUM_HAL_INTERRUPT_TMU2_TICPI2:
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133 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX);
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134 iprX &= ~CYGARC_REG_IPRA_TMU2_MASK;
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135 iprX |= (level)*CYGARC_REG_IPRA_TMU2_PRI1;
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diff changeset
136 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX);
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jlarmour
parents:
diff changeset
137 break;
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jlarmour
parents:
diff changeset
138 case CYGNUM_HAL_INTERRUPT_RTC_ATI:
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jlarmour
parents:
diff changeset
139 case CYGNUM_HAL_INTERRUPT_RTC_PRI:
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jlarmour
parents:
diff changeset
140 case CYGNUM_HAL_INTERRUPT_RTC_CUI:
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jlarmour
parents:
diff changeset
141 HAL_READ_UINT16(CYGARC_REG_IPRA, iprX);
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jlarmour
parents:
diff changeset
142 iprX &= ~CYGARC_REG_IPRA_RTC_MASK;
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jlarmour
parents:
diff changeset
143 iprX |= (level)*CYGARC_REG_IPRA_RTC_PRI1;
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jlarmour
parents:
diff changeset
144 HAL_WRITE_UINT16(CYGARC_REG_IPRA, iprX);
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jlarmour
parents:
diff changeset
145 break;
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jlarmour
parents:
diff changeset
146
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jlarmour
parents:
diff changeset
147 /* IPRB */
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jlarmour
parents:
diff changeset
148 case CYGNUM_HAL_INTERRUPT_SCI_ERI:
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jlarmour
parents:
diff changeset
149 case CYGNUM_HAL_INTERRUPT_SCI_RXI:
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jlarmour
parents:
diff changeset
150 case CYGNUM_HAL_INTERRUPT_SCI_TXI:
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jlarmour
parents:
diff changeset
151 case CYGNUM_HAL_INTERRUPT_SCI_TEI:
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jlarmour
parents:
diff changeset
152 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
153 iprX &= ~CYGARC_REG_IPRB_SCI_MASK;
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jlarmour
parents:
diff changeset
154 iprX |= (level)*CYGARC_REG_IPRB_SCI_PRI1;
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jlarmour
parents:
diff changeset
155 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
156 break;
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jlarmour
parents:
diff changeset
157 case CYGNUM_HAL_INTERRUPT_WDT_ITI:
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jlarmour
parents:
diff changeset
158 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
159 iprX &= ~CYGARC_REG_IPRB_WDT_MASK;
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jlarmour
parents:
diff changeset
160 iprX |= (level)*CYGARC_REG_IPRB_WDT_PRI1;
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jlarmour
parents:
diff changeset
161 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
162 break;
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jlarmour
parents:
diff changeset
163 case CYGNUM_HAL_INTERRUPT_REF_RCMI:
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jlarmour
parents:
diff changeset
164 case CYGNUM_HAL_INTERRUPT_REF_ROVI:
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jlarmour
parents:
diff changeset
165 HAL_READ_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
166 iprX &= ~CYGARC_REG_IPRB_REF_MASK;
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jlarmour
parents:
diff changeset
167 iprX |= (level)*CYGARC_REG_IPRB_REF_PRI1;
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jlarmour
parents:
diff changeset
168 HAL_WRITE_UINT16(CYGARC_REG_IPRB, iprX);
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jlarmour
parents:
diff changeset
169 break;
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jlarmour
parents:
diff changeset
170
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jlarmour
parents:
diff changeset
171 #if (CYGARC_SH_MOD_INTC >= 2)
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jlarmour
parents:
diff changeset
172 #ifndef CYGHWR_HAL_SH_IRQ_USE_IRQLVL
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jlarmour
parents:
diff changeset
173 /* IPRC */
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jlarmour
parents:
diff changeset
174 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0:
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jlarmour
parents:
diff changeset
175 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
176 iprX &= ~CYGARC_REG_IPRC_IRQ0_MASK;
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jlarmour
parents:
diff changeset
177 iprX |= (level)*CYGARC_REG_IPRC_IRQ0_PRI1;
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jlarmour
parents:
diff changeset
178 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
179 break;
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jlarmour
parents:
diff changeset
180 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1:
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jlarmour
parents:
diff changeset
181 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
182 iprX &= ~CYGARC_REG_IPRC_IRQ1_MASK;
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jlarmour
parents:
diff changeset
183 iprX |= (level)*CYGARC_REG_IPRC_IRQ1_PRI1;
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jlarmour
parents:
diff changeset
184 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
185 break;
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jlarmour
parents:
diff changeset
186 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2:
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jlarmour
parents:
diff changeset
187 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
188 iprX &= ~CYGARC_REG_IPRC_IRQ2_MASK;
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jlarmour
parents:
diff changeset
189 iprX |= (level)*CYGARC_REG_IPRC_IRQ2_PRI1;
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jlarmour
parents:
diff changeset
190 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
191 break;
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jlarmour
parents:
diff changeset
192 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3:
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jlarmour
parents:
diff changeset
193 HAL_READ_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
194 iprX &= ~CYGARC_REG_IPRC_IRQ3_MASK;
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jlarmour
parents:
diff changeset
195 iprX |= (level)*CYGARC_REG_IPRC_IRQ3_PRI1;
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jlarmour
parents:
diff changeset
196 HAL_WRITE_UINT16(CYGARC_REG_IPRC, iprX);
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jlarmour
parents:
diff changeset
197 break;
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jlarmour
parents:
diff changeset
198 #endif
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jlarmour
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diff changeset
199 /* IPRD */
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jlarmour
parents:
diff changeset
200 case CYGNUM_HAL_INTERRUPT_PINT_PINT07:
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jlarmour
parents:
diff changeset
201 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
202 iprX &= ~CYGARC_REG_IPRD_PINT07_MASK;
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jlarmour
parents:
diff changeset
203 iprX |= (level)*CYGARC_REG_IPRD_PINT07_PRI1;
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jlarmour
parents:
diff changeset
204 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
205 break;
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jlarmour
parents:
diff changeset
206 case CYGNUM_HAL_INTERRUPT_PINT_PINT8F:
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jlarmour
parents:
diff changeset
207 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
208 iprX &= ~CYGARC_REG_IPRD_PINT8F_MASK;
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jlarmour
parents:
diff changeset
209 iprX |= (level)*CYGARC_REG_IPRD_PINT8F_PRI1;
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jlarmour
parents:
diff changeset
210 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
211 break;
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jlarmour
parents:
diff changeset
212 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5:
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jlarmour
parents:
diff changeset
213 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
214 iprX &= ~CYGARC_REG_IPRD_IRQ5_MASK;
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jlarmour
parents:
diff changeset
215 iprX |= (level)*CYGARC_REG_IPRD_IRQ5_PRI1;
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jlarmour
parents:
diff changeset
216 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
217 break;
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jlarmour
parents:
diff changeset
218 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4:
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jlarmour
parents:
diff changeset
219 HAL_READ_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
220 iprX &= ~CYGARC_REG_IPRD_IRQ4_MASK;
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jlarmour
parents:
diff changeset
221 iprX |= (level)*CYGARC_REG_IPRD_IRQ4_PRI1;
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jlarmour
parents:
diff changeset
222 HAL_WRITE_UINT16(CYGARC_REG_IPRD, iprX);
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jlarmour
parents:
diff changeset
223 break;
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jlarmour
parents:
diff changeset
224
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jlarmour
parents:
diff changeset
225 /* IPRE */
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jlarmour
parents:
diff changeset
226 case CYGNUM_HAL_INTERRUPT_DMAC_DEI0:
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jlarmour
parents:
diff changeset
227 case CYGNUM_HAL_INTERRUPT_DMAC_DEI1:
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jlarmour
parents:
diff changeset
228 case CYGNUM_HAL_INTERRUPT_DMAC_DEI2:
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jlarmour
parents:
diff changeset
229 case CYGNUM_HAL_INTERRUPT_DMAC_DEI3:
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jlarmour
parents:
diff changeset
230 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
231 iprX &= ~CYGARC_REG_IPRE_DMAC_MASK;
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jlarmour
parents:
diff changeset
232 iprX |= (level)*CYGARC_REG_IPRE_DMAC_PRI1;
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jlarmour
parents:
diff changeset
233 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
234 break;
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jlarmour
parents:
diff changeset
235 case CYGNUM_HAL_INTERRUPT_IRDA_ERI1:
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jlarmour
parents:
diff changeset
236 case CYGNUM_HAL_INTERRUPT_IRDA_RXI1:
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jlarmour
parents:
diff changeset
237 case CYGNUM_HAL_INTERRUPT_IRDA_BRI1:
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jlarmour
parents:
diff changeset
238 case CYGNUM_HAL_INTERRUPT_IRDA_TXI1:
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jlarmour
parents:
diff changeset
239 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
240 iprX &= ~CYGARC_REG_IPRE_IRDA_MASK;
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jlarmour
parents:
diff changeset
241 iprX |= (level)*CYGARC_REG_IPRE_IRDA_PRI1;
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jlarmour
parents:
diff changeset
242 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
243 break;
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jlarmour
parents:
diff changeset
244 case CYGNUM_HAL_INTERRUPT_SCIF_ERI2:
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jlarmour
parents:
diff changeset
245 case CYGNUM_HAL_INTERRUPT_SCIF_RXI2:
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jlarmour
parents:
diff changeset
246 case CYGNUM_HAL_INTERRUPT_SCIF_BRI2:
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jlarmour
parents:
diff changeset
247 case CYGNUM_HAL_INTERRUPT_SCIF_TXI2:
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jlarmour
parents:
diff changeset
248 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
249 iprX &= ~CYGARC_REG_IPRE_SCIF_MASK;
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jlarmour
parents:
diff changeset
250 iprX |= (level)*CYGARC_REG_IPRE_SCIF_PRI1;
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jlarmour
parents:
diff changeset
251 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
252 break;
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jlarmour
parents:
diff changeset
253 case CYGNUM_HAL_INTERRUPT_ADC_ADI:
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jlarmour
parents:
diff changeset
254 HAL_READ_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
255 iprX &= ~CYGARC_REG_IPRE_ADC_MASK;
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jlarmour
parents:
diff changeset
256 iprX |= (level)*CYGARC_REG_IPRE_ADC_PRI1;
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jlarmour
parents:
diff changeset
257 HAL_WRITE_UINT16(CYGARC_REG_IPRE, iprX);
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jlarmour
parents:
diff changeset
258 break;
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jlarmour
parents:
diff changeset
259 #endif // (CYGARC_SH_MOD_INTC >= 2)
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jlarmour
parents:
diff changeset
260
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261 #if (CYGARC_SH_MOD_INTC >= 3)
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262 /* IPRF */
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263 case CYGNUM_HAL_INTERRUPT_LCDC_LCDI:
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264 HAL_READ_UINT16(CYGARC_REG_IPRF, iprX);
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265 iprX &= ~CYGARC_REG_IPRF_LCDI_MASK;
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266 iprX |= (level)*CYGARC_REG_IPRF_LCDI_PRI1;
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267 HAL_WRITE_UINT16(CYGARC_REG_IPRF, iprX);
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268 break;
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269 case CYGNUM_HAL_INTERRUPT_PCC_PCC0:
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270 HAL_READ_UINT16(CYGARC_REG_IPRF, iprX);
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271 iprX &= ~CYGARC_REG_IPRF_PCC0_MASK;
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272 iprX |= (level)*CYGARC_REG_IPRF_PCC0_PRI1;
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273 HAL_WRITE_UINT16(CYGARC_REG_IPRF, iprX);
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274 break;
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275 case CYGNUM_HAL_INTERRUPT_PCC_PCC1:
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276 HAL_READ_UINT16(CYGARC_REG_IPRF, iprX);
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277 iprX &= ~CYGARC_REG_IPRF_PCC1_MASK;
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278 iprX |= (level)*CYGARC_REG_IPRF_PCC1_PRI1;
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279 HAL_WRITE_UINT16(CYGARC_REG_IPRF, iprX);
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280 break;
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281 #endif // (CYGARC_SH_MOD_INTC >= 3)
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282
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283 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0:
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284 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0:
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285 /* Do nothing for these reserved vectors. */
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286 break;
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287
165
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diff changeset
288 // Platform extensions
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diff changeset
289 CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vector, level)
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diff changeset
290
134
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291 default:
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292 CYG_FAIL("Unknown interrupt vector");
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293 break;
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294 }
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295 }
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296
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297 void
149
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diff changeset
298 hal_interrupt_set_level(int vector, int level)
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diff changeset
299 {
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300 CYG_ASSERT((0 <= (level) && 15 >= (level)), "Illegal level");
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diff changeset
301 CYG_ASSERT((CYGNUM_HAL_ISR_MIN <= (vector)
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diff changeset
302 && CYGNUM_HAL_ISR_MAX >= (vector)), "Illegal vector");
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diff changeset
303
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diff changeset
304 cyg_hal_ILVL_table[vector] = level;
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diff changeset
305
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diff changeset
306 hal_interrupt_update_level(vector);
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diff changeset
307 }
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diff changeset
308
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diff changeset
309 void
134
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310 hal_interrupt_mask(int vector)
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311 {
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312 switch( (vector) ) {
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313 case CYGNUM_HAL_INTERRUPT_NMI:
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314 /* fall through */
136
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diff changeset
315 case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14:
184
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diff changeset
316 /* Normally can only be masked by fiddling Imask in SR,
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diff changeset
317 but some platforms use external interrupt controller,
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318 so allow regular handling. */
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319 // fall through
136
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320 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0 ... CYGNUM_HAL_ISR_MAX:
149
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diff changeset
321 cyg_hal_IMASK_table[vector] = 0;
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diff changeset
322 hal_interrupt_update_level(vector);
134
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323 break;
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324 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0:
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325 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0:
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326 /* Do nothing for these reserved vectors. */
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327 break;
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328 default:
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329 CYG_FAIL("Unknown interrupt vector");
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330 break;
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331 }
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332 }
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333
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334 void
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335 hal_interrupt_unmask(int vector)
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336 {
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337 switch( (vector) ) {
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338 case CYGNUM_HAL_INTERRUPT_NMI:
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339 /* fall through */
136
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diff changeset
340 case CYGNUM_HAL_INTERRUPT_LVL0 ... CYGNUM_HAL_INTERRUPT_LVL14:
184
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diff changeset
341 /* Normally can only be masked by fiddling Imask in SR,
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diff changeset
342 but some platforms use external interrupt controller,
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343 so allow regular handling. */
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344 // fall through
136
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diff changeset
345 case CYGNUM_HAL_INTERRUPT_TMU0_TUNI0 ... CYGNUM_HAL_ISR_MAX:
149
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diff changeset
346 cyg_hal_IMASK_table[vector] = 1;
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diff changeset
347 hal_interrupt_update_level(vector);
134
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348 break;
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349 case CYGNUM_HAL_INTERRUPT_RESERVED_1E0:
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350 case CYGNUM_HAL_INTERRUPT_RESERVED_3E0:
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351 /* Do nothing for these reserved vectors. */
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352 break;
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353 default:
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354 CYG_FAIL("Unknown interrupt vector");
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355 break;
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diff changeset
356 }
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357 }
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diff changeset
358
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diff changeset
359 void
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360 hal_interrupt_acknowledge(int vector)
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361 {
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362 #if (CYGARC_SH_MOD_INTC >= 2)
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363 if ( (vector) >= CYGNUM_HAL_INTERRUPT_IRQ_IRQ0
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364 && (vector) <= CYGNUM_HAL_INTERRUPT_IRQ_IRQ5) {
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365
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366 cyg_uint8 irr0;
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367
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368 HAL_READ_UINT8(CYGARC_REG_IRR0, irr0);
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369 switch ( vector ) {
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370 #ifndef CYGHWR_HAL_SH_IRQ_USE_IRQLVL
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371 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0:
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372 irr0 &= ~CYGARC_REG_IRR0_IRQ0;
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373 break;
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374 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1:
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375 irr0 &= ~CYGARC_REG_IRR0_IRQ1;
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376 break;
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377 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2:
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diff changeset
378 irr0 &= ~CYGARC_REG_IRR0_IRQ2;
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379 break;
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380 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3:
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381 irr0 &= ~CYGARC_REG_IRR0_IRQ3;
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382 break;
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383 #endif
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384 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4:
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diff changeset
385 irr0 &= ~CYGARC_REG_IRR0_IRQ4;
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386 break;
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387 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5:
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diff changeset
388 irr0 &= ~CYGARC_REG_IRR0_IRQ5;
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diff changeset
389 break;
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390 default:
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391 CYG_FAIL("Unhandled interrupt vector");
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392 }
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393 HAL_WRITE_UINT8(CYGARC_REG_IRR0, irr0);
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394 }
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395 #endif
165
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diff changeset
396
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diff changeset
397 CYGPRI_HAL_INTERRUPT_ACKNOWLEDGE_PLF(vector);
134
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398 }
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399
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400 // Note: The PINTs can be masked and configured individually, even
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401 // though there are only two vectors. Maybe add some fake vectors just
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402 // for masking/configuring?
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403 void
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404 hal_interrupt_configure(int vector, int level, int up)
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405 {
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406 #if (CYGARC_SH_MOD_INTC >= 2)
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407 if ( (vector) >= CYGNUM_HAL_INTERRUPT_IRQ_IRQ0
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408 && (vector) <= CYGNUM_HAL_INTERRUPT_IRQ_IRQ5) {
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409
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410 cyg_uint16 icr1, ss, mask;
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411 ss = 0;
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412 mask = CYGARC_REG_ICR1_SENSE_UP|CYGARC_REG_ICR1_SENSE_LEVEL;
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413 if (up) ss |= CYGARC_REG_ICR1_SENSE_UP;
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414 if (level) ss |= CYGARC_REG_ICR1_SENSE_LEVEL;
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415 CYG_ASSERT(!(up && level), "Cannot trigger on high level!");
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416
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417 switch( (vector) ) {
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418 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ5:
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419 ss <<= CYGARC_REG_ICR1_SENSE_IRQ5_shift;
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420 mask <<= CYGARC_REG_ICR1_SENSE_IRQ5_shift;
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421 break;
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422 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ4:
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423 ss <<= CYGARC_REG_ICR1_SENSE_IRQ4_shift;
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424 mask <<= CYGARC_REG_ICR1_SENSE_IRQ4_shift;
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425 break;
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426 #ifndef CYGHWR_HAL_SH_IRQ_USE_IRQLVL
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427 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ3:
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428 ss <<= CYGARC_REG_ICR1_SENSE_IRQ3_shift;
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429 mask <<= CYGARC_REG_ICR1_SENSE_IRQ3_shift;
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430 break;
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431 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ2:
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432 ss <<= CYGARC_REG_ICR1_SENSE_IRQ2_shift;
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433 mask <<= CYGARC_REG_ICR1_SENSE_IRQ2_shift;
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434 break;
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435 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ1:
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436 ss <<= CYGARC_REG_ICR1_SENSE_IRQ1_shift;
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437 mask <<= CYGARC_REG_ICR1_SENSE_IRQ1_shift;
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438 break;
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439 case CYGNUM_HAL_INTERRUPT_IRQ_IRQ0:
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440 ss <<= CYGARC_REG_ICR1_SENSE_IRQ0_shift;
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441 mask <<= CYGARC_REG_ICR1_SENSE_IRQ0_shift;
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442 break;
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443 #endif
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444 default:
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445 CYG_FAIL("Unhandled interrupt vector");
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446 }
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447
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448 HAL_READ_UINT16(CYGARC_REG_ICR1, icr1);
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449 icr1 &= ~mask;
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450 icr1 |= ss;
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451 HAL_WRITE_UINT16(CYGARC_REG_ICR1, icr1);
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452 }
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453 #endif
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454
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455 CYGPRI_HAL_INTERRUPT_CONFIGURE_PLF(vector, level, up);
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456 }
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457
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458 //---------------------------------------------------------------------------
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459 // End of hal_misc.c