Mercurial > ecos

changeset 3190:28687a49dabc

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
synchronized with variant. [Bugzilla 1001606]
author vae
date Sat, 03 Nov 2012 15:53:42 +0000
parents 068fbe2304f1
children 4f12eb4ce827
files packages/hal/cortexm/kinetis/twr_k40x256/current/ChangeLog packages/hal/cortexm/kinetis/twr_k40x256/current/src/twr_k40x256_misc.c packages/hal/cortexm/kinetis/twr_k60n512/current/ChangeLog packages/hal/cortexm/kinetis/twr_k60n512/current/src/twr_k60n512_misc.c packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/ChangeLog packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_rom.ldi packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/src/twr_k60n512_fxm_misc.c
diffstat 7 files changed, 18 insertions(+), 62 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/kinetis/twr_k40x256/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k40x256/current/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-25  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* src/twr_k40x256_misc.c: Initialization for separate SRAM regions
+	synchronized with variant.                  [Bugzilla 1001606]
+
 2012-05-19  John Dallaway  <john@dallaway.org.uk>
 
 	* cdl/hal_cortexm_kinetis_twr_k40x256.cdl: Reference per-package
--- a/packages/hal/cortexm/kinetis/twr_k40x256/current/src/twr_k40x256_misc.c
+++ b/packages/hal/cortexm/kinetis/twr_k40x256/current/src/twr_k40x256_misc.c
@@ -92,26 +92,6 @@ hal_system_init( void )
     hal_gpio_init();
     hal_start_clocks();
 #endif
-#if defined(CYG_HAL_STARTUP_SRAM) && !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED)
-    // Note: For CYG_HAL_STARTUP_SRAM, the SRAM_L bank simulates ROM
-    // Relocate data from ROM to RAM
-    {
-        register cyg_uint32 *ram_p, *rom_p;
-        for( ram_p = &__ram_data_start, rom_p = &__rom_data_start;
-             ram_p < &__ram_data_end;
-             ram_p++, rom_p++ )
-            *ram_p = *rom_p;
-    }
-
-    // Relocate data from ROM to SRAM
-    {
-        register cyg_uint32 *ram_p, *sram_p;
-        for( ram_p = &__sram_data_start, sram_p = &__srom_data_start;
-             ram_p < &__sram_data_end;
-             ram_p++, sram_p++ )
-            *ram_p = *sram_p;
-    }
-#endif
 }
 
 //===========================================================================
--- a/packages/hal/cortexm/kinetis/twr_k60n512/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k60n512/current/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-25  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* src/twr_k60n512_misc.c: Initialization for separate SRAM regions
+	synchronized with variant.                  [Bugzilla 1001606]
+
 2012-05-19  John Dallaway  <john@dallaway.org.uk>
 
 	* cdl/hal_cortexm_kinetis_twr_k60n512.cdl: Reference per-package
--- a/packages/hal/cortexm/kinetis/twr_k60n512/current/src/twr_k60n512_misc.c
+++ b/packages/hal/cortexm/kinetis/twr_k60n512/current/src/twr_k60n512_misc.c
@@ -92,26 +92,6 @@ hal_system_init( void )
     hal_gpio_init();
     hal_start_clocks();
 #endif
-#if defined(CYG_HAL_STARTUP_SRAM) && !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED)
-    // Note: For CYG_HAL_STARTUP_SRAM, the SRAM_L bank simulates ROM
-    // Relocate data from ROM to RAM
-    {
-        register cyg_uint32 *ram_p, *rom_p;
-        for( ram_p = &__ram_data_start, rom_p = &__rom_data_start;
-             ram_p < &__ram_data_end;
-             ram_p++, rom_p++ )
-            *ram_p = *rom_p;
-    }
-
-    // Relocate data from ROM to SRAM
-    {
-        register cyg_uint32 *ram_p, *sram_p;
-        for( ram_p = &__sram_data_start, sram_p = &__srom_data_start;
-             ram_p < &__sram_data_end;
-             ram_p++, sram_p++ )
-            *ram_p = *sram_p;
-    }
-#endif
 }
 
 //===========================================================================
--- a/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/ChangeLog
@@ -1,3 +1,9 @@
+2012-10-25  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* include/pkgconf/mlt_kinetis_flash_sram2s_extram_rom.ldi:
+	* src/twr_k60n512_misc_fxm.c: Initialization for separate SRAM regions
+	synchronized with variant.                  [Bugzilla 1001606]
+
 2012-01-06 Ilija Kocho  <ilijak@siva.com.mk>
 
 	* cdl/hal_cortexm_kinetis_twr_k60n512_fxm.cdl,
--- a/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_rom.ldi
+++ b/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_rom.ldi
@@ -33,7 +33,7 @@ SECTIONS
     SECTION_gcc_except_table (flash, ALIGN (0x8), LMA_EQ_VMA)
     SECTION_eh_frame (flash, ALIGN (0x8), LMA_EQ_VMA)
     SECTION_got (flash, ALIGN (0x8), LMA_EQ_VMA)
-    USER_SECTION (code_sram, sram_l, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE (NOLOAD), LMA_EQ_VMA)
+    USER_SECTION (code_sram, sram_l, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400 (NOLOAD), LMA_EQ_VMA)
     USER_SECTION (data_sram, sram_u, 0x20000000 (NOLOAD), LMA_EQ_VMA)
     SECTION_data (ram, CYGHWR_HAL_KINETIS_FB_CS0_AR, FOLLOWING (.got))
     SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
@@ -41,6 +41,6 @@ SECTIONS
     SECTIONS_END
 }
 
-hal_vsr_table = (0x20000000);
+hal_vsr_table = (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE);
 hal_virtual_vector_table = hal_vsr_table + 128*4;
 hal_startup_stack = (0x20000000 + CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE);
--- a/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/src/twr_k60n512_fxm_misc.c
+++ b/packages/hal/cortexm/kinetis/twr_k60n512_fxm/current/src/twr_k60n512_fxm_misc.c
@@ -151,26 +151,6 @@ hal_system_init( void )
         hal_start_clocks();
 # endif
 #endif
-#if defined(CYG_HAL_STARTUP_SRAM) && !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED)
-    // Note: For CYG_HAL_STARTUP_SRAM, the SRAM_L bank simulates ROM
-    // Relocate data from ROM to RAM
-    {
-        register cyg_uint32 *ram_p, *rom_p;
-        for( ram_p = &__ram_data_start, rom_p = &__rom_data_start;
-             ram_p < &__ram_data_end;
-             ram_p++, rom_p++ )
-            *ram_p = *rom_p;
-    }
-
-    // Relocate data from ROM to SRAM
-    {
-        register cyg_uint32 *ram_p, *sram_p;
-        for( ram_p = &__sram_data_start, sram_p = &__srom_data_start;
-             ram_p < &__sram_data_end;
-             ram_p++, sram_p++ )
-            *ram_p = *sram_p;
-    }
-#endif
 }
 
 //===========================================================================