Mercurial > flash_v2

annotate packages/hal/arm/sa11x0/assabet/current/include/assabet.h @ 126:518f42066aba ecos-sw-2000-09-19

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Merge from eCos master repository on 2000-09-19-06:25:26-BST
author jlarmour
date Tue, 19 Sep 2000 05:53:51 +0000
parents 0ec04793409a
children e0c0827131d1
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1 #ifndef CYGONCE_ASSABET_H
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2 #define CYGONCE_ASSABET_H
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3
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4 /*=============================================================================
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5 //
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6 // assabet.h
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7 //
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8 // Platform specific support (register layout, etc)
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9 //
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10 //=============================================================================
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11 //####COPYRIGHTBEGIN####
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12 //
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13 // -------------------------------------------
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14 // The contents of this file are subject to the Red Hat eCos Public License
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15 // Version 1.1 (the "License"); you may not use this file except in
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16 // compliance with the License. You may obtain a copy of the License at
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17 // http://www.redhat.com/
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18 //
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19 // Software distributed under the License is distributed on an "AS IS"
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20 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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21 // License for the specific language governing rights and limitations under
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22 // the License.
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23 //
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24 // The Original Code is eCos - Embedded Configurable Operating System,
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25 // released September 30, 1998.
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26 //
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27 // The Initial Developer of the Original Code is Red Hat.
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28 // Portions created by Red Hat are
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29 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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30 // All Rights Reserved.
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31 // -------------------------------------------
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32 //
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33 //####COPYRIGHTEND####
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34 //=============================================================================
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35 //#####DESCRIPTIONBEGIN####
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36 //
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37 // Author(s): gthomas
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38 // Contributors: gthomas
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39 // Date: 2000-05-08
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40 // Purpose: Intel SA1110/Assabet platform specific support routines
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41 // Description:
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42 // Usage: #include <cyg/hal/assabet.h>
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43 //
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44 //####DESCRIPTIONEND####
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45 //
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46 //===========================================================================*/
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47
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48
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49 #ifndef __ASSEMBLER__
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50 //
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51 // Board Control Register
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52 // Note: This register is write-only. Thus a shadow copy is provided so that
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53 // it may be safely updated/shared by multiple threads.
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54 //
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55 extern unsigned long _assabet_BCR; // Shadow copy
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56
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57 extern void assabet_BCR(unsigned long mask, unsigned long value);
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58
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59 //
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60 // Board Configuration data - read at RESET
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61 //
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62 extern unsigned long _assabet_CFG;
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63 #endif
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64
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65 //
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66 // Signal assertion levels
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67 //
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68 #define SA1110_LOGIC_ONE(m) (m & 0xFFFFFFFF)
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69 #define SA1110_LOGIC_ZERO(m) (m & 0x00000000)
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70
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71 //
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72 // SA1110/Assabet Board Control Register
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73 //
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74 #define SA1110_BOARD_CONTROL REG32_PTR(0x12000000)
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75 #define SA1110_BCR_MIN 0x00A014E4 // Reset state
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76
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77 #define SA1110_BCR_CF_POWER 0x00000001 // 1 = CompactFlash power on
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78 #define SA1110_BCR_CF_POWER_ON SA1110_LOGIC_ONE(SA1110_BCR_CF_POWER)
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79 #define SA1110_BCR_CF_POWER_OFF SA1110_LOGIC_ZERO(SA1110_BCR_CF_POWER)
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80 #define SA1110_BCR_CF_RESET 0x00000002 // 1 = CompactFlash reset
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81 #define SA1110_BCR_CF_RESET_ENABLE SA1110_LOGIC_ONE(SA1110_BCR_CF_RESET)
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82 #define SA1110_BCR_CF_RESET_DISABLE SA1110_LOGIC_ZERO(SA1110_BCR_CF_RESET)
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83 #define SA1110_BCR_SOFT_RESET 0x00000004 // 0 = resets UCB1300, ADI7171, UDA1341
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84 #define SA1110_BCR_IRDA_FREQ 0x00000008 // 0 = SIR, 1 = MIR/FIR
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85 #define SA1110_BCR_IRDA_MD 0x00000030 // IrDA Mode & range
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86 #define SA1110_BCR_IRDA_MD_MAX 0x00000000 // Max range and power
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87 #define SA1110_BCR_IRDA_MD_OFF 0x00000010 // Shutdown
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88 #define SA1110_BCR_IRDA_MD_23 0x00000020 // 2/3 power
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89 #define SA1110_BCR_IRDA_MD_13 0x00000030 // 1/3 power
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90 #define SA1110_BCR_STEREO_LB 0x00000040 // 1 = Stereo loopback on
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91 #define SA1110_BCR_CF_BUS 0x00000080 // 0 = CompactFlash bus on
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92 #define SA1110_BCR_CF_BUS_ON SA1110_LOGIC_ZERO(SA1110_BCR_CF_BUS)
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93 #define SA1110_BCR_CF_BUS_OFF SA1110_LOGIC_ONE(SA1110_BCR_CF_BUS)
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94 #define SA1110_BCR_AUDIO_ON 0x00000100 // 1 = UDA1341, MIC, DAA power on
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95 #define SA1110_BCR_BACKLIGHT 0x00000200 // 1 = LCD backlight on
126
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96 #define SA1110_BCR_LCD_BPP 0x00000400 // 1 = 16 RGB, 0 = 12 RGB
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97 #define SA1110_BCR_LCD_16BPP SA1110_LOGIC_ONE(SA1110_BCR_LCD_BPP)
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98 #define SA1110_BCR_LCD_12BPP SA1110_LOGIC_ZERO(SA1110_BCR_LCD_BPP)
108
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99 #define SA1110_BCR_LCD 0x00000800 // 1 = LCD panel and controller on
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100 #define SA1110_BCR_LCD_ON SA1110_LOGIC_ONE(SA1110_BCR_LCD)
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101 #define SA1110_BCR_LCD_OFF SA1110_LOGIC_ZERO(SA1110_BCR_LCD)
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102 #define SA1110_BCR_RS232_ENABLE 0x00001000 // 1 = Enable RD232 signals
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103 #define SA1110_BCR_RED_LED 0x00002000 // 0 = Red LED on
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104 #define SA1110_BCR_RED_LED_ON SA1110_LOGIC_ZERO(SA1110_BCR_RED_LED)
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105 #define SA1110_BCR_RED_LED_OFF SA1110_LOGIC_ONE(SA1110_BCR_RED_LED)
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106 #define SA1110_BCR_GREEN_LED 0x00004000 // 0 = Green LED on
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107 #define SA1110_BCR_GREEN_LED_ON SA1110_LOGIC_ZERO(SA1110_BCR_GREEN_LED)
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108 #define SA1110_BCR_GREEN_LED_OFF SA1110_LOGIC_ONE(SA1110_BCR_GREEN_LED)
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109 #define SA1110_BCR_MOTOR 0x00008000 // 1 = Vibrator motor on
124
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110 #define SA1110_BCR_MOTOR_ON SA1110_LOGIC_ONE(SA1110_BCR_MOTOR)
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111 #define SA1110_BCR_MOTOR_OFF SA1110_LOGIC_ZERO(SA1110_BCR_MOTOR)
108
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112 #define SA1110_BCR_COM_DTR 0x00010000 // COM port Data Terminal Ready
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113 #define SA1110_BCR_COM_RTS 0x00020000 // COM port Request To Send
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114 #define SA1110_BCR_RADIO_WAKE 0x00040000 // 1 = Wake up CPU with radio
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115 #define SA1110_BCR_MUTE 0x00200000 // 1 = Audio muted
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116
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117 //
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118 // Special purpose GPIO interrupt mappings
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119 //
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120 #define SA1110_CF_IRQ CYGNUM_HAL_INTERRUPT_GPIO21
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121 #define SA1110_CF_DETECT CYGNUM_HAL_INTERRUPT_GPIO22
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122
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123 //
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124 // GPIO layout
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125 //
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126 #define SA1110_GPIO_CF_DETECT 0x00400000 // 0 = Compact Flash detect
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127 #define SA1110_GPIO_CF_PRESENT SA1110_LOGIC_ZERO(SA1110_GPIO_CF_DETECT)
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128 #define SA1110_GPIO_CF_ABSENT SA1110_LOGIC_ONE(SA1110_GPIO_CF_DETECT)
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129
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130 //
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131 // LCD Controller
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132 //
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133 #define SA1110_LCCR0 SA11X0_REGISTER(0x30100000)
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134 #define SA1110_LCSR SA11X0_REGISTER(0x30100004)
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135 #define SA1110_DBAR1 SA11X0_REGISTER(0x30100010)
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136 #define SA1110_DCAR1 SA11X0_REGISTER(0x30100014)
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137 #define SA1110_DBAR2 SA11X0_REGISTER(0x30100018)
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138 #define SA1110_DCAR2 SA11X0_REGISTER(0x3010001C)
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139 #define SA1110_LCCR1 SA11X0_REGISTER(0x30100020)
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140 #define SA1110_LCCR2 SA11X0_REGISTER(0x30100024)
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141 #define SA1110_LCCR3 SA11X0_REGISTER(0x30100028)
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142
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143 /*---------------------------------------------------------------------------*/
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144 /* end of assabet.h */
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145 #endif /* CYGONCE_ASSABET_H */