Mercurial > flash_v2

annotate packages/hal/sh/arch/current/include/sh_regs.h @ 115:6ed91473a1cd ecos-sw-2000-08-21

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Merge from eCos master repository on 2000-08-21-22:40:54-BST
author jlarmour
date Fri, 25 Aug 2000 17:32:38 +0000
parents 84e4bde58b26
children 6bd9d475ed4b
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
1 #ifndef CYGONCE_HAL_SH_REGS_H
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
2 #define CYGONCE_HAL_SH_REGS_H
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
3 //=============================================================================
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
4 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
5 // sh_regs.h
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
6 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
7 // SH CPU definitions
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
8 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
9 //=============================================================================
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
10 //####COPYRIGHTBEGIN####
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
11 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
12 // -------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
13 // The contents of this file are subject to the Red Hat eCos Public License
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
14 // Version 1.1 (the "License"); you may not use this file except in
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
15 // compliance with the License. You may obtain a copy of the License at
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
16 // http://www.redhat.com/
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
17 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
18 // Software distributed under the License is distributed on an "AS IS"
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
19 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
20 // License for the specific language governing rights and limitations under
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
21 // the License.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
22 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
23 // The Original Code is eCos - Embedded Configurable Operating System,
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
24 // released September 30, 1998.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
25 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
26 // The Initial Developer of the Original Code is Red Hat.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
27 // Portions created by Red Hat are
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
28 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
29 // All Rights Reserved.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
30 // -------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
31 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
32 //####COPYRIGHTEND####
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
33 //=============================================================================
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
34 //#####DESCRIPTIONBEGIN####
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
35 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
36 // Author(s): jskov
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
37 // Contributors:jskov
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
38 // Date: 1999-04-24
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
39 // Purpose: Define CPU memory mapped registers etc.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
40 // Usage: #include <cyg/hal/sh_regs.h>
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
41 // Notes:
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
42 // This file describes registers for on-core modules found in all
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
43 // the SH3 CPUs supported by the HAL. For each CPU is defined a
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
44 // module specification file (mod_<CPU model number>.h) which lists
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
45 // modules (and their version if applicable) included in that
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
46 // particular CPU model. Note that the versioning is ad hoc;
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
47 // it doesn't reflect Hitachi internal versioning in any way.
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
48 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
49 //####DESCRIPTIONEND####
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
50 //
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
51 //=============================================================================
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
52
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
53 // Find out which modules are supported by the chosen CPU
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
54 // Note: At them moment only some modules are conditionalized (the ones
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
55 // not in the 7708). For consistency, all modules should be treated
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
56 // the same.
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
57 #include <pkgconf/system.h>
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
58 #include CYGBLD_HAL_CPU_MODULES_H
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
59
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
60 //==========================================================================
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
61 // CPU Definitions
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
62 //==========================================================================
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
63
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
64 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
65 // Status register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
66 #define CYGARC_REG_SR_MD 0x40000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
67 #define CYGARC_REG_SR_RB 0x20000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
68 #define CYGARC_REG_SR_BL 0x10000000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
69 #define CYGARC_REG_SR_M 0x00000200
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
70 #define CYGARC_REG_SR_Q 0x00000100
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
71 #define CYGARC_REG_SR_IMASK 0x000000f0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
72 #define CYGARC_REG_SR_I3 0x00000080
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
73 #define CYGARC_REG_SR_I2 0x00000040
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
74 #define CYGARC_REG_SR_I1 0x00000020
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
75 #define CYGARC_REG_SR_I0 0x00000010
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
76 #define CYGARC_REG_SR_S 0x00000002
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
77 #define CYGARC_REG_SR_T 0x00000001
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
78
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
79
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
80 //==========================================================================
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
81 // Memory Mapped Registers
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
82 //==========================================================================
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
83
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
84 //++++++ Module MMU ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
85
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
86 //--------------------------------------------------------------------------
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
87 // MMU control registers
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
88 #define CYGARC_REG_MMUCR 0xffffffe0
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
89
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
90 #define CYGARC_REG_MMUCR_SV 0x00000100
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
91 #define CYGARC_REG_MMUCR_RC_MASK 0x000000c0
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
92 #define CYGARC_REG_MMUCR_TF 0x00000004
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
93 #define CYGARC_REG_MMUCR_IX 0x00000002
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
94 #define CYGARC_REG_MMUCR_AT 0x00000001
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
95
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
96 //++++++ Module CAC ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
97
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
98 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
99 // Cache registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
100 #define CYGARC_REG_CCR 0xffffffec
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
101
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
102 #define CYGARC_REG_CCR_RA 0x00000020
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
103 #define CYGARC_REG_CCR_CF 0x00000008
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
104 #define CYGARC_REG_CCR_CB 0x00000004
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
105 #define CYGARC_REG_CCR_WT 0x00000002
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
106 #define CYGARC_REG_CCR_CE 0x00000001
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
107
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
108 //--------------------------------------------------------------------------
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
109 // Cache registers
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
110 #define CYGARC_REG_CCR 0xffffffec
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
111
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
112 #define CYGARC_REG_CCR_RA 0x00000020
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
113 #define CYGARC_REG_CCR_CF 0x00000008
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
114 #define CYGARC_REG_CCR_CB 0x00000004
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
115 #define CYGARC_REG_CCR_WT 0x00000002
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
116 #define CYGARC_REG_CCR_CE 0x00000001
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
117
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
118
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
119 //++++++ Module BSC ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
120
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
121 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
122 // Bus State Control
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
123 #define CYGARC_REG_BCR1 0xffffff60
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
124 #define CYGARC_REG_BCR2 0xffffff62
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
125 #define CYGARC_REG_WCR1 0xffffff64
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
126 #define CYGARC_REG_WCR2 0xffffff66
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
127 #define CYGARC_REG_MCR 0xffffff68
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
128 #define CYGARC_REG_DCR 0xffffff6a
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
129 #define CYGARC_REG_PCR 0xffffff6c
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
130 #define CYGARC_REG_RTCSR 0xffffff6e
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
131 #define CYGARC_REG_RTCNT 0xffffff70
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
132 #define CYGARC_REG_RTCOR 0xffffff72
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
133 #define CYGARC_REG_RFCR 0xffffff74
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
134
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
135 #ifdef CYGARC_SH_MOD_BCN_V2
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
136 # define CYGARC_REG_BCR3 0xffffff7e
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
137 #endif
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
138
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
139 #define CYGARC_REG_SDMR_AREA2_BASE 0xffffd000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
140 #define CYGARC_REG_SDMR_AREA3_BASE 0xffffe000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
141
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
142 #define CYGARC_REG_BCR1_DRAMTP2 0x0010
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
143 #define CYGARC_REG_BCR1_DRAMTP1 0x0008
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
144 #define CYGARC_REG_BCR1_DRAMTP0 0x0004
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
145
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
146 // Bus widths for areas
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
147 #define CYGARC_REG_BCR2_A6_8 0x1000
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
148 #define CYGARC_REG_BCR2_A6_16 0x2000
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
149 #define CYGARC_REG_BCR2_A6_32 0x3000
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
150 #define CYGARC_REG_BCR2_A5_8 0x0400
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
151 #define CYGARC_REG_BCR2_A5_16 0x0800
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
152 #define CYGARC_REG_BCR2_A5_32 0x0c00
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
153 #define CYGARC_REG_BCR2_A4_8 0x0100
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
154 #define CYGARC_REG_BCR2_A4_16 0x0200
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
155 #define CYGARC_REG_BCR2_A4_32 0x0300
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
156 #define CYGARC_REG_BCR2_A3_8 0x0040
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
157 #define CYGARC_REG_BCR2_A3_16 0x0080
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
158 #define CYGARC_REG_BCR2_A3_32 0x00c0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
159 #define CYGARC_REG_BCR2_A2_8 0x0010
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
160 #define CYGARC_REG_BCR2_A2_16 0x0020
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
161 #define CYGARC_REG_BCR2_A2_32 0x0030
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
162
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
163 // Memory type selection and other IO behavior controls
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
164 #define CYGARC_REG_BCR1_PULA 0x8000 // Pin A25 to A0 Pull-Up
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
165 #define CYGARC_REG_BCR1_PULD 0x4000 // Pin D31 to D0 Pull-Up
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
166 #define CYGARC_REG_BCR1_HIZMEM 0x2000 // Hi-Z memory control
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
167 #define CYGARC_REG_BCR1_HIZCNT 0x1000 // High-Z Control
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
168 #define CYGARC_REG_BCR1_ENDIAN 0x0800 // Endian Flag
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
169 #define CYGARC_REG_BCR1_A0_BST_MASK 0x0600 // Area 0 Burst ROM Control
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
170 #define CYGARC_REG_BCR1_A0_BST_4 0x0200
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
171 #define CYGARC_REG_BCR1_A0_BST_8 0x0400
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
172 #define CYGARC_REG_BCR1_A0_BST_16 0x0600
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
173 #define CYGARC_REG_BCR1_A5_BST_MASK 0x0180 // Area 5 Burst ROM Control
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
174 #define CYGARC_REG_BCR1_A5_BST_4 0x0080
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
175 #define CYGARC_REG_BCR1_A5_BST_8 0x0100
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
176 #define CYGARC_REG_BCR1_A5_BST_16 0x0180
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
177 #define CYGARC_REG_BCR1_A6_BST_MASK 0x0060 // Area 6 Burst ROM Control
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
178 #define CYGARC_REG_BCR1_A6_BST_4 0x0020
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
179 #define CYGARC_REG_BCR1_A6_BST_8 0x0040
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
180 #define CYGARC_REG_BCR1_A6_BST_16 0x0060
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
181 #define CYGARC_REG_BCR1_DRAMTP_MASK 0x001c // Area 2, Area 3 Memory Type
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
182 #define CYGARC_REG_BCR1_A5PCM 0x0002 // Area 5 Bus Type
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
183 #define CYGARC_REG_BCR1_A6PCM 0x0001 // Area 6 Bus Type
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
184
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
185 // Intercycle wait states
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
186 #define CYGARC_REG_WCR1_WAITSEL 0x8000 // WAIT Sampling Timing Select
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
187 #define CYGARC_REG_WCR1_A6I_MASK 0x3000 // Intercycle Idle Specification
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
188 #define CYGARC_REG_WCR1_A6I_SHIFT 12
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
189 #define CYGARC_REG_WCR1_A5I_MASK 0x0c00
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
190 #define CYGARC_REG_WCR1_A5I_SHIFT 10
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
191 #define CYGARC_REG_WCR1_A4I_MASK 0x0300
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
192 #define CYGARC_REG_WCR1_A4I_SHIFT 8
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
193 #define CYGARC_REG_WCR1_A3I_MASK 0x00c0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
194 #define CYGARC_REG_WCR1_A3I_SHIFT 6
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
195 #define CYGARC_REG_WCR1_A2I_MASK 0x0030
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
196 #define CYGARC_REG_WCR1_A2I_SHIFT 4
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
197 #define CYGARC_REG_WCR1_A0I_MASK 0x0003
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
198 #define CYGARC_REG_WCR1_A0I_SHIFT 0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
199
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
200 #define CYGARC_REG_WCR1_1WS 1
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
201 #define CYGARC_REG_WCR1_2WS 2
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
202 #define CYGARC_REG_WCR1_3WS 3
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
203
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
204
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
205 // Wait states
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
206 #define CYGARC_REG_WCR2_A6_MASK 0xe000 // Wait states + burst pitch
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
207 #define CYGARC_REG_WCR2_A6_SHIFT 13
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
208 #define CYGARC_REG_WCR2_A5_MASK 0x1c00 // Wait states + burst pitch
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
209 #define CYGARC_REG_WCR2_A5_SHIFT 10
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
210 #define CYGARC_REG_WCR2_A4_MASK 0x0380 // Wait states
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
211 #define CYGARC_REG_WCR2_A4_SHIFT 7
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
212 #define CYGARC_REG_WCR2_A3_MASK 0x0060 // Wait states / CAS latency
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
213 #define CYGARC_REG_WCR2_A3_SHIFT 5
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
214 #define CYGARC_REG_WCR2_A2_MASK 0x0018 // Wait states / CAS latency
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
215 #define CYGARC_REG_WCR2_A2_SHIFT 3
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
216 #define CYGARC_REG_WCR2_A0_MASK 0x0007 // Wait states + burst pitch
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
217 #define CYGARC_REG_WCR2_A0_SHIFT 0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
218
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
219 #define CYGARC_REG_WCR2_1WS 1
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
220 #define CYGARC_REG_WCR2_2WS 2
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
221 #define CYGARC_REG_WCR2_3WS 3
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
222 #define CYGARC_REG_WCR2_4WS 4
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
223 #define CYGARC_REG_WCR2_6WS 5
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
224 #define CYGARC_REG_WCR2_8WS 6
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
225 #define CYGARC_REG_WCR2_10WS 7
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
226
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
227
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
228
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
229 //++++++ Module UBC ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
230
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
231 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
232 // User Break Control
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
233 #define CYGARC_REG_BRCR 0xffffff98 // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
234
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
235 #define CYGARC_REG_BARA 0xffffffb0 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
236 #define CYGARC_REG_BAMRA 0xffffffb4 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
237 #define CYGARC_REG_BBRA 0xffffffb8 // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
238 #define CYGARC_REG_BASRA 0xffffffe4 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
239
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
240 #define CYGARC_REG_BARB 0xffffffa0 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
241 #define CYGARC_REG_BAMRB 0xffffffa4 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
242 #define CYGARC_REG_BASRB 0xffffffe8 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
243 #define CYGARC_REG_BBRB 0xffffffa8 // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
244 #define CYGARC_REG_BDRB 0xffffff90 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
245 #define CYGARC_REG_BDMRB 0xffffff94 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
246
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
247
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
248 #define CYGARC_REG_BRCR_CMFA 0x8000 // condition match flag A
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
249 #define CYGARC_REG_BRCR_CMFB 0x4000 // condition match flag B
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
250 #define CYGARC_REG_BRCR_PCBA 0x0400 // PC break select A
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
251 #define CYGARC_REG_BRCR_DBEB 0x0080 // data break enable B
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
252 #define CYGARC_REG_BRCR_PCBB 0x0040 // PC break select B
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
253 #define CYGARC_REG_BRCR_SEQ 0x0008 // sequence condition select
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
254
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
255
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
256 //++++++ Module CPG ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
257
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
258 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
259 // Oscillator control registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
260 #define CYGARC_REG_FRQCR 0xffffff80
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
261 #define CYGARC_REG_WTCNT 0xffffff84 // read 8bit, write 16bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
262 #define CYGARC_REG_WTCSR 0xffffff86 // read 8bit, write 16bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
263
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
264 #define CYGARC_REG_WTCNT_WRITE 0x5a00 // top 8bit value for write
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
265
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
266 #define CYGARC_REG_WTCSR_WRITE 0xa500 // top 8bit value for write
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
267 #define CYGARC_REG_WTCSR_TME 0x80 // timer enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
268 #define CYGARC_REG_WTCSR_WT_IT 0x40 // watchdog(1)/interval(0)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
269 #define CYGARC_REG_WTCSR_RSTS 0x20 // manual(1)/poweron(0)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
270 #define CYGARC_REG_WTCSR_WOVF 0x10 // watchdog overflow
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
271 #define CYGARC_REG_WTCSR_IOVF 0x08 // interval overflow
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
272 #define CYGARC_REG_WTCSR_CKS2 0x04 // clock select 2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
273 #define CYGARC_REG_WTCSR_CKS1 0x02 // clock select 1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
274 #define CYGARC_REG_WTCSR_CKS0 0x01 // clock select 0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
275 #define CYGARC_REG_WTCSR_CKSx_MASK 0x07 // clock select mask
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
276 // This is the period (in us) between watchdog reset and overflow.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
277 // (used by the watchdog driver - board specific)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
278 // Based on a 15MHz clock with max delay: 15Mhz/(4096 * 256)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
279 #define CYGARC_REG_WTCSR_CKSx_SETTING 0x07 // max delay
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
280 #define CYGARC_REG_WTCSR_PERIOD 69905067 // ~69.9 ms
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
281
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
282 //++++++ Module TMU ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
283
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
284 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
285 // TMU registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
286 #define CYGARC_REG_TOCR 0xfffffe90 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
287 #define CYGARC_REG_TSTR 0xfffffe92 // 8 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
288 #define CYGARC_REG_TCOR0 0xfffffe94 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
289 #define CYGARC_REG_TCNT0 0xfffffe98 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
290 #define CYGARC_REG_TCR0 0xfffffe9c // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
291 #define CYGARC_REG_TCOR1 0xfffffea0 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
292 #define CYGARC_REG_TCNT1 0xfffffea4 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
293 #define CYGARC_REG_TCR1 0xfffffea8 // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
294 #define CYGARC_REG_TCOR2 0xfffffeac // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
295 #define CYGARC_REG_TCNT2 0xfffffeb0 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
296 #define CYGARC_REG_TCR2 0xfffffeb4 // 16 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
297 #define CYGARC_REG_TCPR2 0xfffffeb8 // 32 bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
298
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
299 // TSTR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
300 #define CYGARC_REG_TSTR_STR0 0x0001
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
301 #define CYGARC_REG_TSTR_STR1 0x0002
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
302 #define CYGARC_REG_TSTR_STR2 0x0004
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
303
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
304 // TCR0/1/2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
305 #define CYGARC_REG_TCR_TPSC0 0x0001
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
306 #define CYGARC_REG_TCR_TPSC1 0x0002
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
307 #define CYGARC_REG_TCR_TPSC2 0x0004
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
308 #define CYGARC_REG_TCR_CKEG0 0x0008
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
309 #define CYGARC_REG_TCR_CKEG1 0x0010
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
310 #define CYGARC_REG_TCR_UNIE 0x0020
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
311 #define CYGARC_REG_TCR_UNF 0x0100
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
312
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
313 // TCR2 additional bits
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
314 #define CYGARC_REG_TCR_ICPE0 0x0040
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
315 #define CYGARC_REG_TCR_ICPE1 0x0080
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
316 #define CYGARC_REG_TCR_ICPF 0x0200
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
317
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
318
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
319 //++++++ Module INTC +++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
320
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
321 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
322 // Interrupt registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
323 #define CYGARC_REG_EXCEVT 0xffffffd4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
324 #define CYGARC_REG_INTEVT 0xffffffd8
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
325
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
326 #define CYGARC_REG_ICR 0xfffffee0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
327 #define CYGARC_REG_IPRA 0xfffffee2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
328 #define CYGARC_REG_IPRB 0xfffffee4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
329
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
330 //#ifdef CYGARC_SH_MOD_INTC_V2 // FIXME: HAL_INTERRUPT_SET_LEVEL needs these
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
331 # define CYGARC_REG_INTEVT2 0xa4000000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
332 # define CYGARC_REG_IRR0 0xa4000004
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
333 # define CYGARC_REG_IRR1 0xa4000006
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
334 # define CYGARC_REG_IRR2 0xa4000008
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
335 # define CYGARC_REG_ICR0 CYGARC_REG_ICR
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
336 # define CYGARC_REG_ICR1 0xa4000010
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
337 # define CYGARC_REG_ICR2 0xa4000012
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
338 # define CYGARC_REG_INTER 0xa4000014
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
339 # define CYGARC_REG_IPRC 0xa4000016
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
340 # define CYGARC_REG_IPRD 0xa4000018
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
341 # define CYGARC_REG_IPRE 0xa400001a
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
342 //#endif
115
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
343 //#ifdef CYGARC_SH_MOD_INTC_V3 // FIXME: HAL_INTERRUPT_SET_LEVEL needs these
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
344 # define CYGARC_REG_IRR3 0xa400000a
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
345 # define CYGARC_REG_IRR4 0xa400000c
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
346 # define CYGARC_REG_IPRF 0xa400001c
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
347 //#endif
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
348
110
84e4bde58b26 Merge from eCos master repository on 2000-07-14-22:00:02-BST
jlarmour
parents: 99
diff changeset
349
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
350 #define CYGARC_REG_IPRA_TMU0_MASK 0xf000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
351 #define CYGARC_REG_IPRA_TMU0_PRI1 0x1000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
352 #define CYGARC_REG_IPRA_TMU1_MASK 0x0f00
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
353 #define CYGARC_REG_IPRA_TMU1_PRI1 0x0100
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
354 #define CYGARC_REG_IPRA_TMU2_MASK 0x00f0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
355 #define CYGARC_REG_IPRA_TMU2_PRI1 0x0010
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
356 #define CYGARC_REG_IPRA_RTC_MASK 0x000f
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
357 #define CYGARC_REG_IPRA_RTC_PRI1 0x0001
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
358
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
359 #define CYGARC_REG_IPRB_WDT_MASK 0xf000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
360 #define CYGARC_REG_IPRB_WDT_PRI1 0x1000
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
361 #define CYGARC_REG_IPRB_REF_MASK 0x0f00
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
362 #define CYGARC_REG_IPRB_REF_PRI1 0x0100
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
363 #define CYGARC_REG_IPRB_SCI_MASK 0x00f0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
364 #define CYGARC_REG_IPRB_SCI_PRI1 0x0010
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
365
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
366 //#ifdef CYGARC_SH_MOD_INTC_V2 // FIXME: HAL_INTERRUPT_SET_LEVEL needs these
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
367 #define CYGARC_REG_IPRC_IRQ3_MASK 0xf000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
368 #define CYGARC_REG_IPRC_IRQ3_PRI1 0x1000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
369 #define CYGARC_REG_IPRC_IRQ2_MASK 0x0f00
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
370 #define CYGARC_REG_IPRC_IRQ2_PRI1 0x0100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
371 #define CYGARC_REG_IPRC_IRQ1_MASK 0x00f0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
372 #define CYGARC_REG_IPRC_IRQ1_PRI1 0x0010
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
373 #define CYGARC_REG_IPRC_IRQ0_MASK 0x000f
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
374 #define CYGARC_REG_IPRC_IRQ0_PRI1 0x0001
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
375
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
376 #define CYGARC_REG_IPRD_PINT07_MASK 0xf000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
377 #define CYGARC_REG_IPRD_PINT07_PRI1 0x1000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
378 #define CYGARC_REG_IPRD_PINT8F_MASK 0x0f00
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
379 #define CYGARC_REG_IPRD_PINT8F_PRI1 0x0100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
380 #define CYGARC_REG_IPRD_IRQ5_MASK 0x00f0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
381 #define CYGARC_REG_IPRD_IRQ5_PRI1 0x0010
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
382 #define CYGARC_REG_IPRD_IRQ4_MASK 0x000f
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
383 #define CYGARC_REG_IPRD_IRQ4_PRI1 0x0001
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
384
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
385 #define CYGARC_REG_IPRE_DMAC_MASK 0xf000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
386 #define CYGARC_REG_IPRE_DMAC_PRI1 0x1000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
387 #define CYGARC_REG_IPRE_IRDA_MASK 0x0f00
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
388 #define CYGARC_REG_IPRE_IRDA_PRI1 0x0100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
389 #define CYGARC_REG_IPRE_SCIF_MASK 0x00f0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
390 #define CYGARC_REG_IPRE_SCIF_PRI1 0x0010
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
391 #define CYGARC_REG_IPRE_ADC_MASK 0x000f
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
392 #define CYGARC_REG_IPRE_ADC_PRI1 0x0001
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
393
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
394 #define CYGARC_REG_ICR1_MAI 0x8000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
395 #define CYGARC_REG_ICR1_IRQLVL 0x4000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
396 #define CYGARC_REG_ICR1_BLMSK 0x2000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
397 #define CYGARC_REG_ICR1_IRLSEN 0x1000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
398 #define CYGARC_REG_ICR1_SENSE_IRQ5_shift 10
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
399 #define CYGARC_REG_ICR1_SENSE_IRQ4_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
400 #define CYGARC_REG_ICR1_SENSE_IRQ3_shift 6
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
401 #define CYGARC_REG_ICR1_SENSE_IRQ2_shift 4
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
402 #define CYGARC_REG_ICR1_SENSE_IRQ1_shift 2
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
403 #define CYGARC_REG_ICR1_SENSE_IRQ0_shift 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
404 #define CYGARC_REG_ICR1_SENSE_LEVEL 0x2
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
405 #define CYGARC_REG_ICR1_SENSE_UP 0x1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
406
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
407 #define CYGARC_REG_IRR0_PINT07 0x80
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
408 #define CYGARC_REG_IRR0_PINT8F 0x40
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
409 #define CYGARC_REG_IRR0_IRQ5 0x20
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
410 #define CYGARC_REG_IRR0_IRQ4 0x10
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
411 #define CYGARC_REG_IRR0_IRQ3 0x08
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
412 #define CYGARC_REG_IRR0_IRQ2 0x04
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
413 #define CYGARC_REG_IRR0_IRQ1 0x02
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
414 #define CYGARC_REG_IRR0_IRQ0 0x01
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
415
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
416 //#endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
417
115
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
418 //#ifdef CYGARC_SH_MOD_INTC_V3 // FIXME: HAL_INTERRUPT_SET_LEVEL needs these
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
419 #define CYGARC_REG_IPRF_LCDI_MASK 0x0f00
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
420 #define CYGARC_REG_IPRF_LCDI_PRI1 0x0100
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
421 #define CYGARC_REG_IPRF_PCC0_MASK 0x00f0
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
422 #define CYGARC_REG_IPRF_PCC0_PRI1 0x0010
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
423 #define CYGARC_REG_IPRF_PCC1_MASK 0x000f
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
424 #define CYGARC_REG_IPRF_PCC1_PRI1 0x0001
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
425
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
426 //#endif
6ed91473a1cd Merge from eCos master repository on 2000-08-21-22:40:54-BST
jlarmour
parents: 110
diff changeset
427
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
428 //++++++ Module RTC ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
429
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
430 //--------------------------------------------------------------------------
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
431 // RealTime Clock
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
432
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
433 #define CYGARC_REG_RC64CNT 0xfffffec0
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
434 #define CYGARC_REG_RSECCNT 0xfffffec2
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
435 #define CYGARC_REG_RMINCNT 0xfffffec4
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
436 #define CYGARC_REG_RHRCNT 0xfffffec6
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
437 #define CYGARC_REG_RWKCNT 0xfffffec8
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
438 #define CYGARC_REG_RDAYCNT 0xfffffeca
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
439 #define CYGARC_REG_RMONCNT 0xfffffecc
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
440 #define CYGARC_REG_RYRCNT 0xfffffece
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
441 #define CYGARC_REG_RSECAR 0xfffffed0
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
442 #define CYGARC_REG_RMINAR 0xfffffed2
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
443 #define CYGARC_REG_RHRAR 0xfffffed4
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
444 #define CYGARC_REG_RWKAR 0xfffffed6
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
445 #define CYGARC_REG_RDAYAR 0xfffffed8
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
446 #define CYGARC_REG_RMONAR 0xfffffeda
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
447 #define CYGARC_REG_RCR1 0xfffffedc
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
448 #define CYGARC_REG_RCR2 0xfffffede
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
449
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
450
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
451 #define CYGARC_REG_RCR1_CF 0x80 // carry flag
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
452 #define CYGARC_REG_RCR1_CIE 0x10 // carry interrupt enable
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
453 #define CYGARC_REG_RCR1_AIE 0x08 // alarm interrupt enable
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
454 #define CYGARC_REG_RCR1_AF 0x01 // alarm flag
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
455
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
456 #define CYGARC_REG_RCR2_PEF 0x80 // periodic interrupt flag
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
457 #define CYGARC_REG_RCR2_PES2 0x40 // periodic interrupt setting
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
458 #define CYGARC_REG_RCR2_PES1 0x20
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
459 #define CYGARC_REG_RCR2_PES0 0x10
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
460 #define CYGARC_REG_RCR2_RTCEN 0x08 // RTC enable
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
461 #define CYGARC_REG_RCR2_ADJ 0x04 // second adjustment
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
462 #define CYGARC_REG_RCR2_RESET 0x02 // reset
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
463 #define CYGARC_REG_RCR2_START 0x01 // start
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
464
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
465
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
466
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
467 //++++++ Module SCI ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
468
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
469 //--------------------------------------------------------------------------
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
470 // Serial registers. All 8 bit registers.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
471 #define CYGARC_REG_SCSMR 0xfffffe80 // serial mode register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
472 #define CYGARC_REG_SCBRR 0xfffffe82 // bit rate register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
473 #define CYGARC_REG_SCSCR 0xfffffe84 // serial control register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
474 #define CYGARC_REG_SCTDR 0xfffffe86 // transmit data register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
475 #define CYGARC_REG_SCSSR 0xfffffe88 // serial status register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
476 #define CYGARC_REG_SCRDR 0xfffffe8a // receive data register
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
477
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
478 #ifdef CYGARC_SH_MOD_SCI_V2
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
479 # define CYGARC_REG_SCSPTR 0xfffffe7c // serial port register
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
480 #endif
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
481
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
482 // Serial Mode Register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
483 #define CYGARC_REG_SCSMR_CA 0x80 // communication mode
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
484 #define CYGARC_REG_SCSMR_CHR 0x40 // character length (7 if set)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
485 #define CYGARC_REG_SCSMR_PE 0x20 // parity enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
486 #define CYGARC_REG_SCSMR_OE 0x10 // parity mode
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
487 #define CYGARC_REG_SCSMR_STOP 0x08 // stop bit length
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
488 #define CYGARC_REG_SCSMR_MP 0x04 // multiprocessor mode
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
489 #define CYGARC_REG_SCSMR_CKS1 0x02 // clock select 1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
490 #define CYGARC_REG_SCSMR_CKS0 0x01 // clock select 0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
491 #define CYGARC_REG_SCSMR_CKSx_MASK 0x03 // mask
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
492
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
493 // Serial Control Register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
494 #define CYGARC_REG_SCSCR_TIE 0x80 // transmit interrupt enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
495 #define CYGARC_REG_SCSCR_RIE 0x40 // receive interrupt enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
496 #define CYGARC_REG_SCSCR_TE 0x20 // transmit enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
497 #define CYGARC_REG_SCSCR_RE 0x10 // receive enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
498 #define CYGARC_REG_SCSCR_MPIE 0x08 // multiprocessor interrupt enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
499 #define CYGARC_REG_SCSCR_TEIE 0x04 // transmit-end interrupt enable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
500 #define CYGARC_REG_SCSCR_CKE1 0x02 // clock enable 1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
501 #define CYGARC_REG_SCSCR_CKE0 0x01 // clock enable 0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
502
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
503 // Serial Status Register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
504 #define CYGARC_REG_SCSSR_TDRE 0x80 // transmit data register empty
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
505 #define CYGARC_REG_SCSSR_RDRF 0x40 // receive data register full
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
506 #define CYGARC_REG_SCSSR_ORER 0x20 // overrun error
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
507 #define CYGARC_REG_SCSSR_FER 0x10 // framing error
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
508 #define CYGARC_REG_SCSSR_PER 0x08 // parity error
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
509 #define CYGARC_REG_SCSSR_TEND 0x04 // transmit end
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
510 #define CYGARC_REG_SCSSR_MPB 0x02 // multiprocessor bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
511 #define CYGARC_REG_SCSSR_MPBT 0x01 // multiprocessor bit transfer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
512
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
513 // When clearing the status register, always write the value:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
514 // CYGARC_REG_SCSSR_CLEARMASK & ~bit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
515 // to prevent other bits than the one of interest to be cleared.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
516 #define CYGARC_REG_SCSSR_CLEARMASK 0xf8
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
517
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
518 // Baud rate values calculated for peripheral clock = 15MHz (Pf = 15).
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
519 // n is CKS setting (0-3)
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
520 // N = (Pf/(64*2^(2n-1)*B))*10^6-1
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
521 // E(%) = ((Pf*10^6/((N+1)*B*(64^(n-1)))-1)*100
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
522 // So this macro is only valid when serial is configured for n=0:
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
523 // N = (Pf/(32*B))*10^6-1
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
524 #define CYGARC_SCBRR_N(_b_) \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
525 (((_b_) < 4800) ? 0 : \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
526 ((_b_) > 115200) ? 0 : \
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
527 (CYGHWR_HAL_SH_BOARD_SPEED*1000000/(32*(_b_))-1))
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 78
diff changeset
528 #define CYGARC_SCBRR_CKSx(_b_) 0
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
529
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
530 //++++++ Module IRDA +++++++++++++++++++++++++++++++++++++++++++++++++++++++
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
531 #ifdef CYGARC_SH_MOD_IRDA
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
532
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
533 //--------------------------------------------------------------------------
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
534 // IrDA (infrared data association). Can also act as regular serial w FIFO
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
535
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
536 #define CYGARC_REG_SCSMR1 0xa4000140
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
537 #define CYGARC_REG_SCBRR1 0xa4000142
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
538 #define CYGARC_REG_SCSCR1 0xa4000144
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
539 #define CYGARC_REG_SCFTDR1 0xa4000146
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
540 #define CYGARC_REG_SCSSR1 0xa4000148
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
541 #define CYGARC_REG_SCFRDR1 0xa400014a
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
542 #define CYGARC_REG_SCFCR1 0xa400014c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
543 #define CYGARC_REG_SCFDR1 0xa400014e
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
544
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
545 // Serial Mode Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
546 #define CYGARC_REG_SCSMR1_IRMOD 0x80 // IrDA Mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
547 #define CYGARC_REG_SCSMR1_ICK_MASK 0x78 // IR pulse width
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
548 #define CYGARC_REG_SCSMR1_PSEL 0x04 // IR pulse selector(?)
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
549 #define CYGARC_REG_SCSMR1_CKS1 0x02 // clock select 1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
550 #define CYGARC_REG_SCSMR1_CKS0 0x01 // clock select 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
551 #define CYGARC_REG_SCSMR1_CKSx_MASK 0x03 // mask
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
552
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
553 // Serial Control Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
554 #define CYGARC_REG_SCSCR1_TIE 0x80 // transmit interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
555 #define CYGARC_REG_SCSCR1_RIE 0x40 // receive interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
556 #define CYGARC_REG_SCSCR1_TE 0x20 // transmit enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
557 #define CYGARC_REG_SCSCR1_RE 0x10 // receive enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
558 #define CYGARC_REG_SCSCR1_CKE1 0x02 // clock enable 1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
559 #define CYGARC_REG_SCSCR1_CKE0 0x01 // clock enable 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
560
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
561 // Serial Status Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
562 #define CYGARC_REG_SCSSR1_PER_MASK 0xf000 // number of parity errors
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
563 #define CYGARC_REG_SCSSR1_PER_shift 12
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
564 #define CYGARC_REG_SCSSR1_FER_MASK 0x0f00 // number of framing errors
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
565 #define CYGARC_REG_SCSSR1_FER_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
566 #define CYGARC_REG_SCSSR1_ER 0x0080 // receive error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
567 #define CYGARC_REG_SCSSR1_TEND 0x0040 // transmit end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
568 #define CYGARC_REG_SCSSR1_TDFE 0x0020 // transmit fifo data empty
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
569 #define CYGARC_REG_SCSSR1_BRK 0x0010 // break detection
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
570 #define CYGARC_REG_SCSSR1_FER 0x0008 // framing error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
571 #define CYGARC_REG_SCSSR1_PER 0x0004 // parity error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
572 #define CYGARC_REG_SCSSR1_RDF 0x0002 // receive fifo data full
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
573 #define CYGARC_REG_SCSSR1_DR 0x0001 // receive data ready
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
574
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
575 // When clearing the status register, always write the value:
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
576 // CYGARC_REG_SCSSR2_CLEARMASK & ~bit
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
577 // to prevent other bits than the one of interest to be cleared.
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
578 #define CYGARC_REG_SCSSR1_CLEARMASK 0xf3
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
579
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
580 // Serial FIFO Control Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
581 #define CYGARC_REG_SCFCR1_RTRG_MASK 0xc0 // receive fifo data trigger
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
582 #define CYGARC_REG_SCFCR1_RTRG_1 0x00 // trigger on 1 char
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
583 #define CYGARC_REG_SCFCR1_RTRG_4 0x40 // trigger on 4 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
584 #define CYGARC_REG_SCFCR1_RTRG_8 0x80 // trigger on 8 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
585 #define CYGARC_REG_SCFCR1_RTRG_14 0xc0 // trigger on 14 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
586
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
587 #define CYGARC_REG_SCFCR1_TTRG_MASK 0x30 // transmit fifo data trigger
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
588 #define CYGARC_REG_SCFCR1_TTRG_8 0x00 // trigger on 8 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
589 #define CYGARC_REG_SCFCR1_TTRG_4 0x10 // trigger on 4 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
590 #define CYGARC_REG_SCFCR1_TTRG_2 0x20 // trigger on 2 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
591 #define CYGARC_REG_SCFCR1_TTRG_1 0x30 // trigger on 1 char
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
592
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
593 #define CYGARC_REG_SCFCR1_MCE 0x08 // modem control enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
594 #define CYGARC_REG_SCFCR1_TFRST 0x04 // transmit fifo reset
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
595 #define CYGARC_REG_SCFCR1_RFRST 0x02 // receive fifo reset
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
596 #define CYGARC_REG_SCFCR1_LOOP 0x01 // loop back test
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
597
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
598
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
599 // Serial FIFO Data Count Set Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
600 #define CYGARC_REG_SCFDR1_RCOUNT_MASK 0x001f // number of chars in r fifo
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
601 #define CYGARC_REG_SCFDR1_RCOUNT_shift 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
602 #define CYGARC_REG_SCFDR1_TCOUNT_MASK 0x1f00 // number of chars in t fifo
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
603 #define CYGARC_REG_SCFDR1_TCOUNT_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
604
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
605 // Baud rate values calculated for peripheral clock = 15MHz (Pf = 15).
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
606 // n is CKS setting (0-3)
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
607 // N = (Pf/(64*2^(2n-1)*B))*10^6-1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
608 // E(%) = ((Pf*10^6/((N+1)*B*(64^(n-1)))-1)*100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
609 // So this macro is only valid when serial is configured for n=0:
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
610 // N = (Pf/(32*B))*10^6-1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
611 #define CYGARC_SCBRR1_N(_b_) \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
612 (((_b_) < 4800) ? 0 : \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
613 ((_b_) > 115200) ? 0 : \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
614 (CYGHWR_HAL_SH_BOARD_SPEED*1000000/(32*(_b_))-1))
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
615 #define CYGARC_SCBRR1_CKSx(_b_) 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
616
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
617 #endif // CYGARC_SH_MOD_IRDA
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
618
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
619 //++++++ Module SCIF +++++++++++++++++++++++++++++++++++++++++++++++++++++++
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
620 #ifdef CYGARC_SH_MOD_SCIF
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
621
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
622 //--------------------------------------------------------------------------
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
623 // Serial w FIFO registers
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
624
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
625 #define CYGARC_REG_SCSMR2 0xa4000150 // Serial mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
626 #define CYGARC_REG_SCBRR2 0xa4000152 // Bit rate
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
627 #define CYGARC_REG_SCSCR2 0xa4000154 // Serial control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
628 #define CYGARC_REG_SCFTDR2 0xa4000156 // Transmit FIFO data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
629 #define CYGARC_REG_SCSSR2 0xa4000158 // Serial status
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
630 #define CYGARC_REG_SCFRDR2 0xa400015a // Receive data FIFO
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
631 #define CYGARC_REG_SCFCR2 0xa400015c // FIFO control register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
632 #define CYGARC_REG_SCFDR2 0xa400015e // FIFO data count set
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
633
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
634 // Serial Mode Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
635 #define CYGARC_REG_SCSMR2_CHR 0x40 // character length (7 if set)
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
636 #define CYGARC_REG_SCSMR2_PE 0x20 // parity enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
637 #define CYGARC_REG_SCSMR2_OE 0x10 // parity mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
638 #define CYGARC_REG_SCSMR2_STOP 0x08 // stop bit length
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
639 #define CYGARC_REG_SCSMR2_CKS1 0x02 // clock select 1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
640 #define CYGARC_REG_SCSMR2_CKS0 0x01 // clock select 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
641 #define CYGARC_REG_SCSMR2_CKSx_MASK 0x03 // mask
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
642
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
643 // Serial Control Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
644 #define CYGARC_REG_SCSCR2_TIE 0x80 // transmit interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
645 #define CYGARC_REG_SCSCR2_RIE 0x40 // receive interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
646 #define CYGARC_REG_SCSCR2_TE 0x20 // transmit enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
647 #define CYGARC_REG_SCSCR2_RE 0x10 // receive enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
648 #define CYGARC_REG_SCSCR2_CKE1 0x02 // clock enable 1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
649 #define CYGARC_REG_SCSCR2_CKE0 0x01 // clock enable 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
650
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
651 // Serial Status Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
652 #define CYGARC_REG_SCSSR2_PER_MASK 0xf000 // number of parity errors
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
653 #define CYGARC_REG_SCSSR2_PER_shift 12
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
654 #define CYGARC_REG_SCSSR2_FER_MASK 0x0f00 // number of framing errors
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
655 #define CYGARC_REG_SCSSR2_FER_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
656 #define CYGARC_REG_SCSSR2_ER 0x0080 // receive error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
657 #define CYGARC_REG_SCSSR2_TEND 0x0040 // transmit end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
658 #define CYGARC_REG_SCSSR2_TDFE 0x0020 // transmit fifo data empty
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
659 #define CYGARC_REG_SCSSR2_BRK 0x0010 // break detection
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
660 #define CYGARC_REG_SCSSR2_FER 0x0008 // framing error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
661 #define CYGARC_REG_SCSSR2_PER 0x0004 // parity error
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
662 #define CYGARC_REG_SCSSR2_RDF 0x0002 // receive fifo data full
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
663 #define CYGARC_REG_SCSSR2_DR 0x0001 // receive data ready
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
664
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
665 // When clearing the status register, always write the value:
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
666 // CYGARC_REG_SCSSR2_CLEARMASK & ~bit
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
667 // to prevent other bits than the one of interest to be cleared.
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
668 #define CYGARC_REG_SCSSR2_CLEARMASK 0xf3
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
669
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
670 // Serial FIFO Control Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
671 #define CYGARC_REG_SCFCR2_RTRG_MASK 0xc0 // receive fifo data trigger
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
672 #define CYGARC_REG_SCFCR2_RTRG_1 0x00 // trigger on 1 char
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
673 #define CYGARC_REG_SCFCR2_RTRG_4 0x40 // trigger on 4 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
674 #define CYGARC_REG_SCFCR2_RTRG_8 0x80 // trigger on 8 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
675 #define CYGARC_REG_SCFCR2_RTRG_14 0xc0 // trigger on 14 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
676
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
677 #define CYGARC_REG_SCFCR2_TTRG_MASK 0x30 // transmit fifo data trigger
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
678 #define CYGARC_REG_SCFCR2_TTRG_8 0x00 // trigger on 8 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
679 #define CYGARC_REG_SCFCR2_TTRG_4 0x10 // trigger on 4 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
680 #define CYGARC_REG_SCFCR2_TTRG_2 0x20 // trigger on 2 chars
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
681 #define CYGARC_REG_SCFCR2_TTRG_1 0x30 // trigger on 1 char
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
682
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
683 #define CYGARC_REG_SCFCR2_MCE 0x08 // modem control enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
684 #define CYGARC_REG_SCFCR2_TFRST 0x04 // transmit fifo reset
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
685 #define CYGARC_REG_SCFCR2_RFRST 0x02 // receive fifo reset
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
686 #define CYGARC_REG_SCFCR2_LOOP 0x01 // loop back test
78
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
687
59d97b6ba612 Merge from eCos master repository on 2000-03-28-19:50:47-BST
jlarmour
parents: 76
diff changeset
688
99
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
689 // Serial FIFO Data Count Set Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
690 #define CYGARC_REG_SCFDR2_RCOUNT_MASK 0x001f // number of chars in r fifo
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
691 #define CYGARC_REG_SCFDR2_RCOUNT_shift 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
692 #define CYGARC_REG_SCFDR2_TCOUNT_MASK 0x1f00 // number of chars in t fifo
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
693 #define CYGARC_REG_SCFDR2_TCOUNT_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
694
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
695 // Baud rate values calculated for peripheral clock = 15MHz (Pf = 15).
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
696 // n is CKS setting (0-3)
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
697 // N = (Pf/(64*2^(2n-1)*B))*10^6-1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
698 // E(%) = ((Pf*10^6/((N+1)*B*(64^(n-1)))-1)*100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
699 // So this macro is only valid when serial is configured for n=0:
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
700 // N = (Pf/(32*B))*10^6-1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
701 #define CYGARC_SCBRR2_N(_b_) \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
702 (((_b_) < 4800) ? 0 : \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
703 ((_b_) > 115200) ? 0 : \
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
704 (CYGHWR_HAL_SH_BOARD_SPEED*1000000/(32*(_b_))-1))
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
705 #define CYGARC_SCBRR2_CKSx(_b_) 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
706
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
707
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
708 #endif // CYGARC_SH_MOD_SCIF
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
709
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
710 //++++++ Module DMAC +++++++++++++++++++++++++++++++++++++++++++++++++++++++
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
711 #ifdef CYGARC_SH_MOD_DMAC
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
712
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
713 //--------------------------------------------------------------------------
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
714 // DMA Controller registers
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
715
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
716 #define CYGARC_REG_SAR0 0xa4000020
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
717 #define CYGARC_REG_DAR0 0xa4000024
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
718 #define CYGARC_REG_DMATCR0 0xa4000028
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
719 #define CYGARC_REG_CHCR0 0xa400002c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
720 #define CYGARC_REG_SAR1 0xa4000030
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
721 #define CYGARC_REG_DAR1 0xa4000034
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
722 #define CYGARC_REG_DMATCR1 0xa4000038
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
723 #define CYGARC_REG_CHCR1 0xa400003c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
724 #define CYGARC_REG_SAR2 0xa4000040
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
725 #define CYGARC_REG_DAR2 0xa4000044
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
726 #define CYGARC_REG_DMATCR2 0xa4000048
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
727 #define CYGARC_REG_CHCR2 0xa400004c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
728 #define CYGARC_REG_SAR3 0xa4000050
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
729 #define CYGARC_REG_DAR3 0xa4000054
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
730 #define CYGARC_REG_DMATCR3 0xa4000058
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
731 #define CYGARC_REG_CHCR3 0xa400005c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
732 #define CYGARC_REG_DMAOR 0xa4000060
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
733
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
734 // DMA Channel Control Register 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
735 #define CYGARC_REG_CHCR0_RL 0x00040000 // request check level
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
736 #define CYGARC_REG_CHCR0_AM 0x00020000 // acknowledge mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
737 #define CYGARC_REG_CHCR0_AL 0x00010000 // acknowledge level
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
738 #define CYGARC_REG_CHCR0_DM1 0x00008000 // destination address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
739 #define CYGARC_REG_CHCR0_DM0 0x00004000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
740 #define CYGARC_REG_CHCR0_SM1 0x00002000 // source address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
741 #define CYGARC_REG_CHCR0_SM2 0x00001000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
742 #define CYGARC_REG_CHCR0_RS3 0x00000800 // resource select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
743 #define CYGARC_REG_CHCR0_RS2 0x00000400
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
744 #define CYGARC_REG_CHCR0_RS1 0x00000200
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
745 #define CYGARC_REG_CHCR0_RS0 0x00000100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
746 #define CYGARC_REG_CHCR0_DS 0x00000040 // DREQ select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
747 #define CYGARC_REG_CHCR0_TM 0x00000020 // transmit mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
748 #define CYGARC_REG_CHCR0_TS1 0x00000010 // transmit size
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
749 #define CYGARC_REG_CHCR0_TS0 0x00000008
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
750 #define CYGARC_REG_CHCR0_IE 0x00000004 // interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
751 #define CYGARC_REG_CHCR0_TE 0x00000002 // transfer end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
752 #define CYGARC_REG_CHCR0_DE 0x00000001 // DMAC enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
753
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
754 // DMA Channel Control Register 1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
755 #define CYGARC_REG_CHCR1_RL 0x00040000 // request check level
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
756 #define CYGARC_REG_CHCR1_AM 0x00020000 // acknowledge mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
757 #define CYGARC_REG_CHCR1_AL 0x00010000 // acknowledge level
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
758 #define CYGARC_REG_CHCR1_DM1 0x00008000 // destination address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
759 #define CYGARC_REG_CHCR1_DM0 0x00004000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
760 #define CYGARC_REG_CHCR1_SM1 0x00002000 // source address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
761 #define CYGARC_REG_CHCR1_SM2 0x00001000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
762 #define CYGARC_REG_CHCR1_RS3 0x00000800 // resource select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
763 #define CYGARC_REG_CHCR1_RS2 0x00000400
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
764 #define CYGARC_REG_CHCR1_RS1 0x00000200
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
765 #define CYGARC_REG_CHCR1_RS0 0x00000100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
766 #define CYGARC_REG_CHCR1_DS 0x00000040 // DREQ select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
767 #define CYGARC_REG_CHCR1_TM 0x00000020 // transmit mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
768 #define CYGARC_REG_CHCR1_TS1 0x00000010 // transmit size
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
769 #define CYGARC_REG_CHCR1_TS0 0x00000008
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
770 #define CYGARC_REG_CHCR1_IE 0x00000004 // interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
771 #define CYGARC_REG_CHCR1_TE 0x00000002 // transfer end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
772 #define CYGARC_REG_CHCR1_DE 0x00000001 // DMAC enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
773
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
774 // DMA Channel Control Register 2
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
775 #define CYGARC_REG_CHCR2_RO 0x00080000 // source address reload
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
776 #define CYGARC_REG_CHCR2_DM1 0x00008000 // destination address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
777 #define CYGARC_REG_CHCR2_DM0 0x00004000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
778 #define CYGARC_REG_CHCR2_SM1 0x00002000 // source address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
779 #define CYGARC_REG_CHCR2_SM2 0x00001000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
780 #define CYGARC_REG_CHCR2_RS3 0x00000800 // resource select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
781 #define CYGARC_REG_CHCR2_RS2 0x00000400
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
782 #define CYGARC_REG_CHCR2_RS1 0x00000200
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
783 #define CYGARC_REG_CHCR2_RS0 0x00000100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
784 #define CYGARC_REG_CHCR2_TM 0x00000020 // transmit mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
785 #define CYGARC_REG_CHCR2_TS1 0x00000010 // transmit size
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
786 #define CYGARC_REG_CHCR2_TS0 0x00000008
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
787 #define CYGARC_REG_CHCR2_IE 0x00000004 // interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
788 #define CYGARC_REG_CHCR2_TE 0x00000002 // transfer end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
789 #define CYGARC_REG_CHCR2_DE 0x00000001 // DMAC enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
790
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
791 // DMA Channel Control Register 3
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
792 #define CYGARC_REG_CHCR3_DI 0x00100000 // direct/indirect selection
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
793 #define CYGARC_REG_CHCR3_DM1 0x00008000 // destination address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
794 #define CYGARC_REG_CHCR3_DM0 0x00004000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
795 #define CYGARC_REG_CHCR3_SM1 0x00002000 // source address mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
796 #define CYGARC_REG_CHCR3_SM2 0x00001000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
797 #define CYGARC_REG_CHCR3_RS3 0x00000800 // resource select
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
798 #define CYGARC_REG_CHCR3_RS2 0x00000400
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
799 #define CYGARC_REG_CHCR3_RS1 0x00000200
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
800 #define CYGARC_REG_CHCR3_RS0 0x00000100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
801 #define CYGARC_REG_CHCR3_TM 0x00000020 // transmit mode
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
802 #define CYGARC_REG_CHCR3_TS1 0x00000010 // transmit size
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
803 #define CYGARC_REG_CHCR3_TS0 0x00000008
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
804 #define CYGARC_REG_CHCR3_IE 0x00000004 // interrupt enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
805 #define CYGARC_REG_CHCR3_TE 0x00000002 // transfer end
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
806 #define CYGARC_REG_CHCR3_DE 0x00000001 // DMAC enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
807
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
808 // DMA Operation Register
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
809 #define CYGARC_REG_DMAOR_PR1 0x0200 // priority level
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
810 #define CYGARC_REG_DMAOR_PR0 0x0100
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
811 #define CYGARC_REG_DMAOR_AE 0x0004 // address error flag
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
812 #define CYGARC_REG_DMAOR_NMIF 0x0002 // NMI flag
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
813 #define CYGARC_REG_DMAOR_DME 0x0001 // DMA master enable
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
814
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
815
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
816 #endif // CYGARC_SH_MOD_DMAC
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
817
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
818 //++++++ Module PFC +++++++++++++++++++++++++++++++++++++++++++++++++++++++
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
819 #ifdef CYGARC_SH_MOD_PFC
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
820
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
821 #define CYGARC_REG_PACR 0xa4000100 // port A control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
822 #define CYGARC_REG_PBCR 0xa4000102 // port B control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
823 #define CYGARC_REG_PCCR 0xa4000104 // port C control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
824 #define CYGARC_REG_PDCR 0xa4000106 // port D control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
825 #define CYGARC_REG_PECR 0xa4000108 // port E control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
826 #define CYGARC_REG_PFCR 0xa400010a // port F control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
827 #define CYGARC_REG_PGCR 0xa400010c // port G control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
828 #define CYGARC_REG_PHCR 0xa400010e // port H control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
829 #define CYGARC_REG_PJCR 0xa4000110 // port J control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
830 #define CYGARC_REG_PKCR 0xa4000112 // port K control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
831 #define CYGARC_REG_PLCR 0xa4000114 // port L control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
832 #define CYGARC_REG_SCPCR 0xa4000116 // SC port control
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
833
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
834 #define CYGARC_REG_PADR 0xa4000120 // port A data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
835 #define CYGARC_REG_PBDR 0xa4000122 // port B data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
836 #define CYGARC_REG_PCDR 0xa4000124 // port C data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
837 #define CYGARC_REG_PDDR 0xa4000126 // port D data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
838 #define CYGARC_REG_PEDR 0xa4000128 // port E data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
839 #define CYGARC_REG_PFDR 0xa400012a // port F data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
840 #define CYGARC_REG_PGDR 0xa400012c // port G data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
841 #define CYGARC_REG_PHDR 0xa400012e // port H data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
842 #define CYGARC_REG_PJDR 0xa4000130 // port J data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
843 #define CYGARC_REG_PKDR 0xa4000132 // port K data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
844 #define CYGARC_REG_PLDR 0xa4000134 // port L data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
845 #define CYGARC_REG_SCPDR 0xa4000136 // SC port data
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
846
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
847
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
848 // Port C
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
849 #define CYGARC_REG_PCCR_PC7_MASK 0xc000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
850 #define CYGARC_REG_PCCR_PC7_shift 14
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
851 #define CYGARC_REG_PCCR_PC6_MASK 0x3000
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
852 #define CYGARC_REG_PCCR_PC6_shift 12
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
853 #define CYGARC_REG_PCCR_PC5_MASK 0x0c00
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
854 #define CYGARC_REG_PCCR_PC5_shift 10
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
855 #define CYGARC_REG_PCCR_PC4_MASK 0x0300
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
856 #define CYGARC_REG_PCCR_PC4_shift 8
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
857 #define CYGARC_REG_PCCR_PC3_MASK 0x00c0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
858 #define CYGARC_REG_PCCR_PC3_shift 6
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
859 #define CYGARC_REG_PCCR_PC2_MASK 0x0030
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
860 #define CYGARC_REG_PCCR_PC2_shift 4
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
861 #define CYGARC_REG_PCCR_PC1_MASK 0x000c
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
862 #define CYGARC_REG_PCCR_PC1_shift 2
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
863 #define CYGARC_REG_PCCR_PC0_MASK 0x0003
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
864 #define CYGARC_REG_PCCR_PC0_shift 0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
865
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
866 #define CYGARC_REG_PCCR_MD_OTHER 0x0
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
867 #define CYGARC_REG_PCCR_MD_OUT 0x1
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
868 #define CYGARC_REG_PCCR_MD_IN_ON 0x2
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
869 #define CYGARC_REG_PCCR_MD_IN_OFF 0x3
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
870
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
871 #define CYGARC_REG_PCDR_PC7DT 0x80
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
872 #define CYGARC_REG_PCDR_PC6DT 0x40
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
873 #define CYGARC_REG_PCDR_PC5DT 0x20
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
874 #define CYGARC_REG_PCDR_PC4DT 0x10
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
875 #define CYGARC_REG_PCDR_PC3DT 0x08
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
876 #define CYGARC_REG_PCDR_PC2DT 0x04
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
877 #define CYGARC_REG_PCDR_PC1DT 0x02
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
878 #define CYGARC_REG_PCDR_PC0DT 0x01
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
879
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
880
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
881 #endif // CYGARC_SH_MOD_PFC
97d9d85b42c0 Merge from eCos master repository on 2000-06-07-14:25:36-BST
jlarmour
parents: 80
diff changeset
882
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents:
diff changeset
883 #endif // ifndef CYGONCE_HAL_SH_REGS_H