Mercurial > flash_v2

annotate packages/kernel/current/tests/kcache1.c @ 66:bf00f99aec69 ecos-sw-2000-02-02

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Merge from eCos master repository on 2000-02-02-19:16:44-GMT
author jlarmour
date Wed, 02 Feb 2000 19:57:02 +0000
parents c38311975d4f
children 435cced73e2f
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1 /*=================================================================
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2 //
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3 // kcache1.c
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4 //
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5 // Cache timing test
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): dsm
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35 // Contributors: dsm, nickg
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36 // Date: 1998-06-18
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37 //####DESCRIPTIONEND####
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38 */
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39
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40 #include <cyg/hal/hal_arch.h> // CYGNUM_HAL_STACK_SIZE_TYPICAL
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41
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42 #include <cyg/kernel/kapi.h>
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43
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44 #include <cyg/infra/testcase.h>
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45
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46 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK
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47 #ifdef CYGFUN_KERNEL_API_C
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48
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49 #include <cyg/infra/diag.h>
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50 #include <cyg/hal/hal_cache.h>
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51 #include <cyg/hal/hal_intr.h>
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52
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53 // -------------------------------------------------------------------------
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54 // If the HAL does not supply this, we supply our own version
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55
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56 #ifndef HAL_DCACHE_PURGE_ALL
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57 # ifdef HAL_DCACHE_SYNC
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58
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59 #define HAL_DCACHE_PURGE_ALL() HAL_DCACHE_SYNC()
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61 # else
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62
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63 static cyg_uint8 dca[HAL_DCACHE_SIZE + HAL_DCACHE_LINE_SIZE*2];
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64
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65 #define HAL_DCACHE_PURGE_ALL() \
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66 CYG_MACRO_START \
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67 volatile cyg_uint8 *addr = &dca[HAL_DCACHE_LINE_SIZE]; \
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68 volatile cyg_uint8 tmp = 0; \
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69 int i; \
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70 for( i = 0; i < HAL_DCACHE_SIZE; i += HAL_DCACHE_LINE_SIZE ) \
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71 { \
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72 tmp = addr[i]; \
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73 } \
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74 CYG_MACRO_END
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75
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76 # endif
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77 #endif
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78
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79 // -------------------------------------------------------------------------
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80
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81 #define NTHREADS 1
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82 #define STACKSIZE CYGNUM_HAL_STACK_SIZE_TYPICAL
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83
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84 static cyg_handle_t thread[NTHREADS];
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85
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86 static cyg_thread thread_obj[NTHREADS];
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87 static char stack[NTHREADS][STACKSIZE];
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88
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89 #ifndef MAX_STRIDE
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90 #define MAX_STRIDE 64
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91 #endif
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92
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93 volatile char m[(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE)*MAX_STRIDE];
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94
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95 // -------------------------------------------------------------------------
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96
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97 static void time0(register cyg_uint32 stride)
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98 {
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99 register cyg_uint32 j,k;
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100 cyg_tick_count_t count0, count1;
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101 cyg_ucount32 t;
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102 register char c;
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103
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104 count0 = cyg_current_time();
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105
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106 k = 0;
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107 if ( cyg_test_is_simulator )
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108 k = 3960;
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109
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110 for(; k<4000;k++) {
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111 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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112 c=m[stride*j];
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113 }
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114 }
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115
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116 count1 = cyg_current_time();
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117 t = count1 - count0;
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118 diag_printf("stride=%d, time=%d\n", stride, t);
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119 }
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120
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121 // -------------------------------------------------------------------------
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122
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123 void time1(void)
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124 {
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125 cyg_uint32 i;
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126
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127 for(i=1; i<=MAX_STRIDE; i+=i) {
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128 time0(i);
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129 }
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130 }
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131
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132 // -------------------------------------------------------------------------
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133 // With an ICache invalidate in the middle:
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134 #ifdef HAL_ICACHE_INVALIDATE_ALL
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135 static void time0II(register cyg_uint32 stride)
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136 {
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137 register cyg_uint32 j,k;
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138 cyg_tick_count_t count0, count1;
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139 cyg_ucount32 t;
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140 register char c;
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141
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142 count0 = cyg_current_time();
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143
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144 k = 0;
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145 if ( cyg_test_is_simulator )
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146 k = 3960;
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147
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148 for(; k<4000;k++) {
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149 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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150 HAL_ICACHE_INVALIDATE_ALL();
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151 c=m[stride*j];
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152 }
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153 }
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154
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155 count1 = cyg_current_time();
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156 t = count1 - count0;
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157 diag_printf("stride=%d, time=%d\n", stride, t);
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158 }
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159
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160 // -------------------------------------------------------------------------
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161
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162 void time1II(void)
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163 {
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164 cyg_uint32 i;
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165
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166 for(i=1; i<=MAX_STRIDE; i+=i) {
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167 time0II(i);
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168 }
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169 }
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170 #endif
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171 // -------------------------------------------------------------------------
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172 // With a DCache invalidate in the middle:
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173 #ifdef HAL_DCACHE_INVALIDATE_ALL
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174 static void time0DI(register cyg_uint32 stride)
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175 {
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176 register cyg_uint32 j,k;
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177 cyg_tick_count_t count0, count1;
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178 cyg_ucount32 t;
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179 register char c;
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180
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181 count0 = cyg_current_time();
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182
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183 HAL_DCACHE_SYNC();
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184
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185 k = 0;
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186 if ( cyg_test_is_simulator )
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187 k = 3960;
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188
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189 for(; k<4000;k++) {
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190 for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
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191 HAL_DCACHE_INVALIDATE_ALL();
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192 c=m[stride*j];
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193 }
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194 }
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195
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196 count1 = cyg_current_time();
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197 t = count1 - count0;
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198 diag_printf("stride=%d, time=%d\n", stride, t);
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199 }
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200
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201 // -------------------------------------------------------------------------
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202
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203 void time1DI(void)
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204 {
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205 cyg_uint32 i;
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206
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207 for(i=1; i<=MAX_STRIDE; i+=i) {
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208 time0DI(i);
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209 }
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210 }
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211 #endif
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212 // -------------------------------------------------------------------------
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213 // This test could be improved by counting number of passes possible
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214 // in a given number of ticks.
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215
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216 static void entry0( cyg_addrword_t data )
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217 {
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218 register CYG_INTERRUPT_STATE oldints;
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219
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220 #ifdef HAL_CACHE_UNIFIED
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221
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222 HAL_DISABLE_INTERRUPTS(oldints);
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223 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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224 HAL_UCACHE_INVALIDATE_ALL();
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225 HAL_UCACHE_DISABLE();
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226 HAL_RESTORE_INTERRUPTS(oldints);
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227 CYG_TEST_INFO("Cache off");
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228 time1();
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229
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230 HAL_DISABLE_INTERRUPTS(oldints);
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231 HAL_DCACHE_PURGE_ALL(); // rely on above definition
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232 HAL_UCACHE_INVALIDATE_ALL();
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233 HAL_UCACHE_ENABLE();
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234 HAL_RESTORE_INTERRUPTS(oldints);
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235 CYG_TEST_INFO("Cache on");
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236 time1();
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237
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238 #else // HAL_CACHE_UNIFIED
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239
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240 HAL_DISABLE_INTERRUPTS(oldints);
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241 HAL_DCACHE_PURGE_ALL();
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242 HAL_ICACHE_INVALIDATE_ALL();
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243 HAL_DCACHE_INVALIDATE_ALL();
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244 HAL_ICACHE_DISABLE();
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245 HAL_DCACHE_DISABLE();
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246 HAL_RESTORE_INTERRUPTS(oldints);
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247 CYG_TEST_INFO("Dcache off Icache off");
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248 time1();
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249
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250 HAL_DISABLE_INTERRUPTS(oldints);
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251 HAL_DCACHE_PURGE_ALL();
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252 HAL_ICACHE_INVALIDATE_ALL();
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253 HAL_DCACHE_INVALIDATE_ALL();
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254 HAL_ICACHE_DISABLE();
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255 HAL_DCACHE_ENABLE();
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256 HAL_RESTORE_INTERRUPTS(oldints);
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257 CYG_TEST_INFO("Dcache on Icache off");
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258 time1();
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259
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260 HAL_DISABLE_INTERRUPTS(oldints);
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261 HAL_DCACHE_PURGE_ALL();
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262 HAL_ICACHE_INVALIDATE_ALL();
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263 HAL_DCACHE_INVALIDATE_ALL();
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264 HAL_ICACHE_ENABLE();
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265 HAL_DCACHE_DISABLE();
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266 HAL_RESTORE_INTERRUPTS(oldints);
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267 CYG_TEST_INFO("Dcache off Icache on");
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268 time1();
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269
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270 HAL_DISABLE_INTERRUPTS(oldints);
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271 HAL_DCACHE_PURGE_ALL();
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272 HAL_ICACHE_INVALIDATE_ALL();
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273 HAL_DCACHE_INVALIDATE_ALL();
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274 HAL_ICACHE_ENABLE();
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275 HAL_DCACHE_ENABLE();
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276 HAL_RESTORE_INTERRUPTS(oldints);
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277 CYG_TEST_INFO("Dcache on Icache on");
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278 time1();
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279
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280
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281 HAL_DISABLE_INTERRUPTS(oldints);
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282 HAL_DCACHE_PURGE_ALL();
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283 HAL_ICACHE_INVALIDATE_ALL();
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284 HAL_DCACHE_INVALIDATE_ALL();
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285 HAL_ICACHE_DISABLE();
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286 HAL_DCACHE_DISABLE();
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287 HAL_RESTORE_INTERRUPTS(oldints);
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288 CYG_TEST_INFO("Dcache off Icache off (again)");
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289 time1();
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290
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291 #if defined(HAL_DCACHE_INVALIDATE_ALL) || defined(HAL_ICACHE_INVALIDATE_ALL)
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292 HAL_DISABLE_INTERRUPTS(oldints);
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293 HAL_DCACHE_PURGE_ALL();
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294 HAL_ICACHE_INVALIDATE_ALL();
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295 HAL_DCACHE_INVALIDATE_ALL();
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296 HAL_ICACHE_ENABLE();
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297 HAL_DCACHE_ENABLE();
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298 HAL_RESTORE_INTERRUPTS(oldints);
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299 CYG_TEST_INFO("Dcache on Icache on (again)");
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300 time1();
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301
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302 #if defined(CYGPKG_HAL_MIPS)
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303 // In some architectures, the time taken for the next two tests is
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304 // very long, partly because HAL_XCACHE_INVALIDATE_ALL() is implemented
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305 // with a loop over the cache. Hence these tests take longer than the
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306 // testing infrastructure is prepared to wait. The simplest way to get
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307 // these tests to run quickly is to make them think they are running
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308 // under a simulator.
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309
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310 cyg_test_is_simulator = 1;
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311
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312 #endif
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313
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314 #ifdef HAL_ICACHE_INVALIDATE_ALL
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315 HAL_DISABLE_INTERRUPTS(oldints);
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316 HAL_DCACHE_PURGE_ALL();
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317 HAL_ICACHE_INVALIDATE_ALL();
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318 HAL_DCACHE_INVALIDATE_ALL();
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319 HAL_ICACHE_ENABLE();
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320 HAL_DCACHE_ENABLE();
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321 HAL_RESTORE_INTERRUPTS(oldints);
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322 CYG_TEST_INFO("Dcache on Icache on: invalidate ICache each time");
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323 time1II();
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324 #endif
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325 #ifdef HAL_DCACHE_INVALIDATE_ALL
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326 HAL_DISABLE_INTERRUPTS(oldints);
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327 HAL_DCACHE_PURGE_ALL();
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328 HAL_ICACHE_INVALIDATE_ALL();
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329 HAL_DCACHE_INVALIDATE_ALL();
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330 HAL_ICACHE_ENABLE();
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331 HAL_DCACHE_ENABLE();
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332 HAL_RESTORE_INTERRUPTS(oldints);
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333 CYG_TEST_INFO("Dcache on Icache on: invalidate DCache (expect bogus times)");
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334 time1DI();
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335 #endif
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336 #endif // either INVALIDATE_ALL macro
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337
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338 #endif // HAL_CACHE_UNIFIED
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339
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340 CYG_TEST_PASS_FINISH("End of test");
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341 }
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342
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343 // -------------------------------------------------------------------------
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344
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345 void kcache2_main( void )
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346 {
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347 CYG_TEST_INIT();
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348
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349 cyg_thread_create(4, entry0 , (cyg_addrword_t)0, "kcache1",
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350 (void *)stack[0], STACKSIZE, &thread[0], &thread_obj[0]);
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351 cyg_thread_resume(thread[0]);
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352
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353 cyg_scheduler_start();
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354 }
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355
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356 // -------------------------------------------------------------------------
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357
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358 externC void
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359 cyg_start( void )
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360 {
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361 kcache2_main();
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362 }
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363
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364 // -------------------------------------------------------------------------
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365
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366 #else // def CYGFUN_KERNEL_API_C
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367 #define N_A_MSG "Kernel C API layer disabled"
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368 #endif // def CYGFUN_KERNEL_API_C
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369 #else // def CYGVAR_KERNEL_COUNTERS_CLOCK
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370 #define N_A_MSG "Kernel real-time clock disabled"
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371 #endif // def CYGVAR_KERNEL_COUNTERS_CLOCK
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372
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373 #ifdef N_A_MSG
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374 externC void
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375 cyg_start( void )
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376 {
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377 CYG_TEST_INIT();
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378 CYG_TEST_NA( N_A_MSG );
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379 }
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380 #endif // N_A_MSG
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381
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382 // -------------------------------------------------------------------------
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383 /* EOF kcache1.c */