nand-ecoscentric: packages/hal/mn10300/arch/current/include/hal

annotate packages/hal/mn10300/arch/current/include/hal_intr.h @ 64:c38311975d4f ecos-sw-2000-01-28

Merge from eCos master repository on 2000-01-28-04:28:11-GMT

author	jlarmour
date	Fri, 28 Jan 2000 04:59:39 +0000
parents	3836136e7743
children	bf00f99aec69

rev	line source
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	1 #ifndef CYGONCE_HAL_HAL_INTR_H
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	2 #define CYGONCE_HAL_HAL_INTR_H
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	3 //==========================================================================
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	4 //
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	5 // hal_intr.h
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	6 //
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	7 // HAL Interrupt and clock support
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	8 //
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	9 //==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	10 //####COPYRIGHTBEGIN####
64 c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	11 //
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	12 // -------------------------------------------
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	13 // The contents of this file are subject to the Red Hat eCos Public License
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	14 // Version 1.0 (the "License"); you may not use this file except in
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	15 // compliance with the License. You may obtain a copy of the License at
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	16 // http://sourceware.cygnus.com/ecos
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	17 //
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	18 // Software distributed under the License is distributed on an
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	19 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	20 // License for the specific language governing rights and limitations under
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	21 // the License.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	22 //
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	23 // The Original Code is eCos - Embedded Configurable Operating System,
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	24 // released September 30, 1998.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	25 //
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	26 // The Initial Developer of the Original Code is Red Hat.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	27 // Portions created by Red Hat are
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	28 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	29 // All Rights Reserved.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	30 // -------------------------------------------
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 60 diff changeset	31 //
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	32 //####COPYRIGHTEND####
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	33 //==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	34 //#####DESCRIPTIONBEGIN####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	35 //
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	36 // Author(s): nickg
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	37 // Contributors: nickg, jlarmour
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	38 // Date: 1999-02-18
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	39 // Purpose: Define Interrupt support
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	40 // Description: The macros defined here provide the HAL APIs for handling
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	41 // interrupts and the clock.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	42 // Usage:
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	43 // #include <cyg/hal/hal_intr.h>
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	44 // ...
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	45 //
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	46 //
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	47 //####DESCRIPTIONEND####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	48 //
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	49 //==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	50
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	51 #include <pkgconf/hal.h>
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	52
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	53 #include <cyg/infra/cyg_type.h>
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	54 #include <cyg/hal/hal_io.h>
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	55
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	56 #include <cyg/hal/var_intr.h>
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	57
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	58 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	59 // Static data used by HAL
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	60
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	61 // ISR tables
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	62 externC volatile CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	63 externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	64 externC volatile CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	65
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	66 // VSR table
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	67 externC volatile CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	68
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	69 // MN10300 interrupt control registers, mapped by linker script.
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	70 externC volatile cyg_uint16 mn10300_interrupt_control[];
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	71
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	72 //--------------------------------------------------------------------------
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	73 // Default ISR
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	74 // The #define is used to test whether this routine exists, and to allow
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	75 // us to call it.
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	76
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	77 externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	78
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	79 #define HAL_DEFAULT_ISR hal_default_isr
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	80
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	81 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	82 // Interrupt state storage
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	83
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	84 typedef cyg_uint32 CYG_INTERRUPT_STATE;
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	85
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	86 //--------------------------------------------------------------------------
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	87
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	88 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	89
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	90 // Routine to execute DSRs using separate interrupt stack
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	91 externC void hal_interrupt_stack_call_pending_DSRs(void);
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	92 #define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	93 hal_interrupt_stack_call_pending_DSRs()
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	94
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	95 // these are offered solely for stack usage testing
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	96 // if they are not defined, then there is no interrupt stack.
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	97 #define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	98 #define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	99 // use them to declare these extern however you want:
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	100 // extern char HAL_INTERRUPT_STACK_BASE[];
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	101 // extern char HAL_INTERRUPT_STACK_TOP[];
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	102 // is recommended
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	103
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	104 #endif
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	105
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	106 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	107 // Interrupt control macros
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	108
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	109 #define HAL_DISABLE_INTERRUPTS(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	110 asm volatile ( \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	111 "mov psw,%0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	112 "mov 0xF7FF,d0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	113 "and %0,d0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	114 "mov d0,psw;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	115 "and 0x0800,%0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	116 : "=d"(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	117 : \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	118 : "d0" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	119 );
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	120
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	121 #define HAL_ENABLE_INTERRUPTS() \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	122 asm volatile ( \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	123 "mov psw,d0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	124 "or 0x0800,d0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	125 "mov d0,psw;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	126 : \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	127 : \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	128 : "d0" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	129 );
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	130
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	131 #define HAL_RESTORE_INTERRUPTS(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	132 asm volatile ( \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	133 "mov psw,d1;" \
60 3836136e7743 Merge from eCos master repository on 1999-12-17-19:44:58-GMT jlarmour parents: 30 diff changeset	134 "and 0xF7FF,d1;" \
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	135 "or %0,d1;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	136 "mov d1,psw;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	137 : \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	138 : "d"(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	139 : "d1" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	140 );
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	141
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	142 #define HAL_QUERY_INTERRUPTS(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	143 asm volatile ( \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	144 "mov psw,%0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	145 "and 0x0800,%0;" \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	146 : "=d"(_old_) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	147 );
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	148
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	149 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	150 // Translate a vector number into an ISR table index.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	151 // If we have chained interrupts we have just a single ISR per priority
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	152 // level. On the MN103000 there are several interrupts per controller,
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	153 // so we have to decode to one of 100 vectors. On the MN103002 there is
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	154 // only one interrupt per controller, so we can have just one ISR per
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	155 // controller, except for the NMI vectors which occupy the first 3 slots.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	156
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	157 #ifndef HAL_TRANSLATE_VECTOR
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	158
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	159 #if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	160
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	161 #define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	162 { \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	163 if( _vector_ <= CYGNUM_HAL_INTERRUPT_SYSTEM_ERROR ) \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	164 (_index_) = (_vector_); \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	165 else \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	166 { \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	167 /* ICRs are 16 bit regs at 32 bit spacing */ \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	168 cyg_ucount16 _ix_ = ((_vector_)>>2)<<1; \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	169 \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	170 /* read the appropriate interrupt control register */ \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	171 cyg_uint16 _icr_ = mn10300_interrupt_control[_ix_]; \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	172 \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	173 /* extract interrupt priority level */ \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	174 _index_ = CYGNUM_HAL_INTERRUPT_RESERVED_3 + ((_icr_ >> 12) & 0x7); \
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	175 } \
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	176 }
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	177
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	178 #else
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	179
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	180 #define HAL_TRANSLATE_VECTOR(_vector_,_index_) _index_ = (_vector_)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	181
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	182 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	183
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	184 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	185
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	186 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	187 // Interrupt and VSR attachment macros
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	188
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	189 #define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	190 CYG_MACRO_START \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	191 cyg_uint32 _index_; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	192 HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	193 \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	194 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	195 (_state_) = 0; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	196 else \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	197 (_state_) = 1; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	198 CYG_MACRO_END
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	199
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	200 #define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	201 CYG_MACRO_START \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	202 cyg_uint32 _index_; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	203 HAL_TRANSLATE_VECTOR(_vector_,_index_); \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	204 \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	205 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR ) \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	206 { \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	207 hal_interrupt_handlers[_index_] = (CYG_ADDRESS)_isr_; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	208 hal_interrupt_data[_index_] = (CYG_ADDRWORD)_data_; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	209 hal_interrupt_objects[_index_] = (CYG_ADDRESS)_object_; \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	210 } \
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	211 CYG_MACRO_END
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	212
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	213 #define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	214 CYG_MACRO_START \
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	215 cyg_uint32 _index_; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	216 HAL_TRANSLATE_VECTOR(_vector_,_index_); \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	217 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	218 if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)_isr_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	219 { \
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	220 hal_interrupt_handlers[_index_] = (CYG_ADDRESS)HAL_DEFAULT_ISR; \
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	221 hal_interrupt_data[_index_] = 0; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	222 hal_interrupt_objects[_index_] = 0; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	223 } \
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	224 CYG_MACRO_END
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	225
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	226 #define HAL_VSR_GET( _vector_, _pvsr_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	227 ((CYG_ADDRESS )_pvsr_) = hal_vsr_table[_vector_];
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	228
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	229
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	230 #define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	231 if( _poldvsr_ != NULL ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	232 (CYG_ADDRESS )_poldvsr_ = hal_vsr_table[_vector_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	233 hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_;
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	234
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	235
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	236 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	237 // Interrupt controller access
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	238 // Read interrupt control registers back after writing to them. This
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	239 // ensures that the written value is not sitting in the store buffers
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	240 // when interrupts are re-enabled.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	241 #define HAL_INTERRUPT_MASK( _vector_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	242 { \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	243 /* ICRs are 16 bit regs at 32 bit spacing */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	244 cyg_ucount16 _index_ = ((_vector_)>>2)<<1; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	245 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	246 /* read the appropriate interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	247 cyg_uint16 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	248 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	249 /* clear interrupt enable bit for this vector */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	250 _icr_ &= ~(0x0100<<((_vector_)&3)); \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	251 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	252 /* restore the interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	253 mn10300_interrupt_control[_index_] = _icr_; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	254 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	255 }
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	256
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	257 #define HAL_INTERRUPT_UNMASK( _vector_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	258 { \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	259 /* ICRs are 16 bit regs at 32 bit spacing */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	260 cyg_ucount16 _index_ = (_vector_>>2)<<1; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	261 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	262 /* read the appropriate interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	263 cyg_uint16 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	264 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	265 /* set interrupt enable bit for this vector */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	266 _icr_ \|= (0x0100<<(_vector_&3)); \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	267 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	268 /* restore the interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	269 mn10300_interrupt_control[_index_] = _icr_; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	270 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	271 }
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	272
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	273 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	274 { \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	275 /* ICRs are 16 bit regs at 32 bit spacing */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	276 cyg_ucount16 _index_ = ((_vector_)>>2)<<1; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	277 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	278 /* read the appropriate interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	279 cyg_uint16 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	280 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	281 /* clear interrupt request bit for this vector */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	282 _icr_ &= ~(0x0010<<((_vector_)&3)); \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	283 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	284 /* set interrupt detect bit for this vector */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	285 _icr_ \|= (0x0001<<((_vector_)&3)); \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	286 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	287 /* restore the interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	288 mn10300_interrupt_control[_index_] = _icr_; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	289 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	290 }
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	291
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	292 #if !defined(HAL_INTERRUPT_CONFIGURE)
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	293
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	294 #error HAL_INTERRUPT_CONFIGURE not defined by variant
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	295
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	296 #endif
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	297
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	298 #define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	299 { \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	300 /* ICRs are 16 bit regs at 32 bit spacing */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	301 cyg_ucount16 _index_ = (_vector_>>2)<<1; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	302 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	303 /* read the appropriate interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	304 cyg_uint16 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	305 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	306 /* set interrupt level for this group of vectors */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	307 _icr_ &= 0x0FFF; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	308 _icr_ \|= (_level_)<<12; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	309 \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	310 /* restore the interrupt control register */ \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	311 mn10300_interrupt_control[_index_] = _icr_; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	312 _icr_ = mn10300_interrupt_control[_index_]; \
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	313 }
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	314
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	315 //--------------------------------------------------------------------------
30 641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	316 // Clock control.
641b639be825 Merge from eCos master repository on 1999-08-16-22:01:37-BST jlarmour parents: 8 diff changeset	317 // This is almost all handled in the var_intr.h.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	318
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	319 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	320 #define HAL_CLOCK_LATENCY(_pvalue_) HAL_CLOCK_READ(_pvalue_)
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	321 #endif
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	322
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	323 //--------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	324 #endif // ifndef CYGONCE_HAL_HAL_INTR_H
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	325 // EOF hal_intr.h

Mercurial > nand-ecoscentric

annotate packages/hal/mn10300/arch/current/include/hal_intr.h @ 64:c38311975d4f ecos-sw-2000-01-28