Mercurial > nand-ecoscentric

changeset 3271:be10f73f67e2

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Recognize 256 Bytes space for virtual vectors in sram. Recognize 256 Bytes space for virtual vectors in sram.
author vae
date Sun, 04 Nov 2012 13:51:56 +0000
parents ea482849d620
children 6877414b6275
files packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_ram.ldi packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi
diffstat 4 files changed, 16 insertions(+), 4 deletions(-) [+]
line wrap: on
line diff
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
@@ -1,3 +1,12 @@
+2012-11-04  Ilija Kocho  <ilijak@siva.com.mk>
+
+	* twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_ram.ldi
+	* twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi:
+	Recognize 256 Bytes space for virtual vectors in sram.
+
+	* twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl:
+	Add settings for Kinetis internal flash.  [Bugzilla 1001561]
+
 2012-09-28  Ilija Kocho  <ilijak@siva.com.mk>
 
 	* twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
@@ -9,7 +18,7 @@ 2012-09-28  Ilija Kocho  <ilijak@siva.co
 	* twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi
 	* twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_rom.h
 	* twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_rom.ldi
-	* twr_k70f120m/current/src/twr_k70f120m_misc.c
+	* twr_k70f120m/current/src/twr_k70f120m_misc.c:
 	Synchronized with Kinetis variant changes to SDRAM controller support.
 	Memory layouts adapted to separate data and code cacing partitions.
 	                                            [Bugzilla 1001606]
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
@@ -62,6 +62,10 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS_T
     requires      { CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM == 70 }
     requires      { CYGHWR_HAL_CORTEXM_KINETIS_FLASH_NAME == "1M0" }
     requires      { CYGHWR_HAL_CORTEXM_KINETIS_REV == 2 }
+    requires      { is_active(CYGPKG_DEVS_FLASH_KINETIS) implies
+                    CYGNUM_DEVS_KINETIS_FLASH_BLOCK_SIZE == 0x1000 }
+    requires      { is_active(CYGPKG_DEVS_FLASH_KINETIS) implies
+                    CYGNUM_DEVS_KINETIS_FLASH_LONGWORD_SIZE == 8 }
 
     implements    CYGINT_IO_SERIAL_FREESCALE_UART2
 
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_ram.ldi
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_sram2s_extram_ram.ldi
@@ -16,7 +16,7 @@ MEMORY
 SECTIONS
 {
     SECTIONS_BEGIN
-    USER_SECTION (code_sram, sram_l, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400 (NOLOAD), LMA_EQ_VMA)
+    USER_SECTION (code_sram, sram_l, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400 + 0x100, LMA_EQ_VMA)
     SECTION_sram (sram, 0x20000000, LMA_EQ_VMA)
     SECTION_rom_vectors (ramcod, CYGHWR_HAL_KINETIS_DDR_CODE_BASE, LMA_EQ_VMA)
     SECTION_RELOCS (ramcod, ALIGN (0x8), LMA_EQ_VMA)
--- a/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi
+++ b/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/pkgconf/mlt_kinetis_flash_unisram_extram_ram.ldi
@@ -16,7 +16,7 @@ MEMORY
 SECTIONS
 {
     SECTIONS_BEGIN
-    SECTION_sram (sram, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400, LMA_EQ_VMA)
+    SECTION_sram (sram, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400 + 0x100, LMA_EQ_VMA)
     SECTION_rom_vectors (ramcod, CYGHWR_HAL_KINETIS_DDR_CODE_BASE, LMA_EQ_VMA)
     SECTION_RELOCS (ramcod, ALIGN (0x8), LMA_EQ_VMA)
     SECTION_text (ramcod, ALIGN (0x8), LMA_EQ_VMA)
@@ -36,6 +36,5 @@ SECTIONS
 
 hal_vsr_table = (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE);
 hal_virtual_vector_table = hal_vsr_table + 128*4;
-//hal_startup_stack = CYGHWR_HAL_KINETIS_DDR_CACHED_BASE + CYGHWR_HAL_KINETIS_DDR_CACHED_SIZE;
 hal_startup_stack = 0x20000000 + CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE;