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annotate packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @ 434:c4fa19c99259

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Improve 16as8 functionality
author gthomas
date Mon, 25 Nov 2002 23:19:56 +0000
parents 5b4cd8e2de16
children 4dbb32159a9c
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1 #ifndef CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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2 #define CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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3 //==========================================================================
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4 //
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5 // am29xxxxx_parts.inl
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6 //
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7 // AMD AM29xxxxx part descriptors
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8 //
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9 //==========================================================================
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10 //####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 // Copyright (C) 2002 Gary Thomas
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License along
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26 // with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use macros
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30 // or inline functions from this file, or you compile this file and link it
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31 // with other works to produce a work based on this file, this file does not
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32 // by itself cause the resulting work to be covered by the GNU General Public
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33 // License. However the source code for this file must still be made available
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34 // in accordance with section (3) of the GNU General Public License.
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35 //
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36 // This exception does not invalidate any other reasons why a work based on
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37 // this file might be covered by the GNU General Public License.
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38 //
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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40 // at http://sources.redhat.com/ecos/ecos-license/
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41 // -------------------------------------------
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42 //####ECOSGPLCOPYRIGHTEND####
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43 //==========================================================================
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44 //#####DESCRIPTIONBEGIN####
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45 //
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46 // Author(s): jskov
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47 // Contributors: jskov, Koichi Nagashima
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48 // Date: 2001-06-08
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49 // Purpose:
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50 // Description: AMD AM29xxxxx part descriptors
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51 // Usage: Should be included from the flash_am29xxxxx.inl file only.
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52 //
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53 // FIXME: Add configury for selecting bottom/top bootblocks
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54 //####DESCRIPTIONEND####
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55 //
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56 //==========================================================================
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57
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58 //
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59 // Note: 'bootblocks' are a set of blocks which are treated by
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60 // the driver as a single larger block. This simplifies the driver
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61 // so as to only have to deal with single size blocks (even though
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62 // the physical device may differ). The data structure is laid out as:
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63 // <address of start of boot block area 1>
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64 // <size of sub-block 1>
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65 // <size of sub-block 2>
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66 // ...
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67 // <size of sub-block n>
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68 // <address of start of boot block area 2>
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69 // <size of sub-block 1>
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70 // <size of sub-block 2>
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71 // ...
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72 // <size of sub-block n>
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73 // _LAST_BOOTBLOCK
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74 //
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75 // Finally, when specifying a device with bootblocks, the total number
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76 // of blocks should reflect this collapse, i.e. if the device has 15
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77 // full size blocks and 8 blocks which are 1/8 each, then the total
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78 // should be 16 blocks.
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79 //
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80 #define _LAST_BOOTBLOCK (-1)
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81
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82 #if CYGNUM_FLASH_WIDTH == 8
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83 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F040B
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84 { // AM29F040B
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85 device_id : FLASHWORD(0xa4),
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86 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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87 block_count: 8,
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88 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
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89 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
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90 bootblock : false,
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91 banked : false
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92 },
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93 #endif
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94 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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95 { // MBM29LV160-T | AM29LV160-T
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96 device_id : FLASHWORD(0xc4),
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97 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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98 block_count: 32,
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99 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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100 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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101 bootblock : true,
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102 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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103 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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104 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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105 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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106 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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107 _LAST_BOOTBLOCK
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108 },
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109 banked : false
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110 },
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111 { // MBM29LV160-B | AM29LV160-B
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112 device_id : FLASHWORD(0x49),
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113 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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114 block_count: 32,
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115 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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116 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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117 bootblock : true,
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118 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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119 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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120 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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121 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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122 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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123 _LAST_BOOTBLOCK
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124 },
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125 banked : false
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126 },
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127 #endif
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128 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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129 { // AM29LV200-T
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130 device_id : FLASHWORD(0x3b),
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131 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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132 block_count: 4,
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133 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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134 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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135 bootblock : true,
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136 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
137 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
138 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
139 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
140 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
141 _LAST_BOOTBLOCK
208
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parents: 201
diff changeset
142 },
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143 banked : false
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diff changeset
144 },
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145 { // AM29LV200-B
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146 device_id : FLASHWORD(0xbf),
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147 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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148 block_count: 4,
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diff changeset
149 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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150 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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151 bootblock : true,
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152 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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153 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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154 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
155 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
156 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
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157 _LAST_BOOTBLOCK
208
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parents: 201
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158 },
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159 banked : false
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160 },
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diff changeset
161 #endif
221
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162 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
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163 { // AM29LV320DT
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164 device_id : FLASHWORD(0xF6),
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165 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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166 block_count: 64,
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167 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
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168 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents: 210
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169 bootblock : true,
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170 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
diff changeset
171 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
172 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
173 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
174 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
175 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
176 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
177 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
178 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
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179 _LAST_BOOTBLOCK
221
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parents: 210
diff changeset
180 },
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parents: 210
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181 banked : false
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182 },
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183 { // AM29LV320D
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184 device_id : FLASHWORD(0xF9),
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parents: 210
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185 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
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186 block_count: 64,
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parents: 210
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187 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
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188 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents: 210
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189 bootblock : true,
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parents: 210
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190 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
diff changeset
191 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
192 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
193 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
194 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
diff changeset
195 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
diff changeset
196 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
diff changeset
197 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
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198 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
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199 _LAST_BOOTBLOCK
221
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parents: 210
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200 },
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parents: 210
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201 banked : false
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202 },
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parents: 210
diff changeset
203 #endif
161
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204 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
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205 { // AM29DL324D-T
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206 device_id : FLASHWORD(0x5c),
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207 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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208 block_count: 64,
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209 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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210 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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211 bootblock : true,
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212 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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213 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
214 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
215 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
216 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
217 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
218 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
219 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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220 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
221 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
222 },
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parents: 161
diff changeset
223 banked : true,
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diff changeset
224 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 161
diff changeset
225 0
161
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diff changeset
226 }
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parents:
diff changeset
227 },
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228 { // AM29DL324D-B
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229 device_id : FLASHWORD(0x5f),
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230 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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231 block_count: 64,
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232 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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233 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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234 bootblock : true,
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235 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
236 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
237 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
238 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
239 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
240 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
241 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
242 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
243 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
244 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
245 },
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parents: 161
diff changeset
246 banked : true,
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parents: 161
diff changeset
247 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 161
diff changeset
248 0
161
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249 }
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250 },
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251 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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diff changeset
252 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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parents: 221
diff changeset
253 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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diff changeset
254 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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parents: 221
diff changeset
255 device_id : FLASHWORD(0x7e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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parents: 221
diff changeset
256 device_id2 : FLASHWORD(0x02),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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parents: 221
diff changeset
257 device_id3 : FLASHWORD(0x01),
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diff changeset
258 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
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diff changeset
259 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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diff changeset
260 device_size: 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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parents: 221
diff changeset
261 base_mask : ~(0x8000000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
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parents: 353
diff changeset
262 bootblock : true,
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parents: 353
diff changeset
263 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
264 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
265 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
266 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
267 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
268 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
269 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
270 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
271 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 353
diff changeset
272 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 353
diff changeset
273 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
274 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
275 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
276 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
277 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 353
diff changeset
278 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 353
diff changeset
279 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
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diff changeset
280 0x2000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 353
diff changeset
281 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
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diff changeset
282 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
283 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
284 banks : { 0x0700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
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diff changeset
285 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
286 0x0100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
287 0
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
288 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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diff changeset
289 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
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diff changeset
290 #endif
161
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291 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
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292 { // AM29F800-T
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293 device_id : FLASHWORD(0xd6),
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294 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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295 block_count: 16,
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diff changeset
296 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
297 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents:
diff changeset
298 bootblock : true,
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diff changeset
299 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
300 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
301 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
302 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
303 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
304 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
305 },
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parents: 161
diff changeset
306 banked : false
161
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jlarmour
parents:
diff changeset
307 },
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jlarmour
parents:
diff changeset
308 { // AM29F800-B
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diff changeset
309 device_id : FLASHWORD(0x58),
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diff changeset
310 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
311 block_count: 16,
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312 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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313 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
314 bootblock : true,
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diff changeset
315 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
316 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
317 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
318 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
319 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
320 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
321 },
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parents: 161
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322 banked : false
161
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parents:
diff changeset
323 },
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diff changeset
324 #endif
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diff changeset
325 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
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326 { // AM29LV800-T
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327 device_id : FLASHWORD(0xda),
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328 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
329 block_count: 16,
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diff changeset
330 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
331 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents:
diff changeset
332 bootblock : true,
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parents:
diff changeset
333 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
334 0x08000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
335 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
336 0x02000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
337 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
338 _LAST_BOOTBLOCK
174
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jlarmour
parents: 161
diff changeset
339 },
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parents: 161
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340 banked : false
161
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parents:
diff changeset
341 },
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jlarmour
parents:
diff changeset
342 { // AM29LV800-B
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diff changeset
343 device_id : FLASHWORD(0x5b),
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diff changeset
344 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
345 block_count: 16,
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diff changeset
346 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
347 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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diff changeset
348 bootblock : true,
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diff changeset
349 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
350 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
351 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
352 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
353 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
354 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
355 },
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parents: 161
diff changeset
356 banked : false
161
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jlarmour
parents:
diff changeset
357 },
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diff changeset
358 #endif
201
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parents: 195
diff changeset
359 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
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parents: 195
diff changeset
360 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
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jlarmour
parents: 195
diff changeset
361 device_id : FLASHWORD(0xCE),
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diff changeset
362 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
363 block_count: 16,
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diff changeset
364 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
365 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 195
diff changeset
366 bootblock : true,
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parents: 195
diff changeset
367 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
368 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
369 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 195
diff changeset
370 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 195
diff changeset
371 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
372 _LAST_BOOTBLOCK
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
373 },
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jlarmour
parents: 195
diff changeset
374 banked : false
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jlarmour
parents: 195
diff changeset
375 },
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jlarmour
parents: 195
diff changeset
376 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
377
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
378 #else // 16 bit devices
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jlarmour
parents:
diff changeset
379
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jlarmour
parents:
diff changeset
380 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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jlarmour
parents:
diff changeset
381 { // MBM29LV160-T | AM29LV160-T
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jlarmour
parents:
diff changeset
382 device_id : FLASHWORD(0x22c4),
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jlarmour
parents:
diff changeset
383 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
384 block_count: 32,
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jlarmour
parents:
diff changeset
385 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
386 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
387 bootblock : true,
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jlarmour
parents:
diff changeset
388 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
389 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
390 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
391 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
392 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
393 _LAST_BOOTBLOCK
174
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jlarmour
parents: 161
diff changeset
394 },
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jlarmour
parents: 161
diff changeset
395 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
396 },
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jlarmour
parents:
diff changeset
397 { // MBM29LV160-B | AM29LV160-B
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jlarmour
parents:
diff changeset
398 device_id : FLASHWORD(0x2249),
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jlarmour
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diff changeset
399 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
400 block_count: 32,
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jlarmour
parents:
diff changeset
401 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
402 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents:
diff changeset
403 bootblock : true,
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jlarmour
parents:
diff changeset
404 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
405 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
406 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
407 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
408 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
409 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
410 },
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jlarmour
parents: 161
diff changeset
411 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
412 },
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jlarmour
parents:
diff changeset
413 #endif
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
414 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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jlarmour
parents: 201
diff changeset
415 { // AM29LV200-T
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jlarmour
parents: 201
diff changeset
416 device_id : FLASHWORD(0x223b),
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jlarmour
parents: 201
diff changeset
417 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
418 block_count: 4,
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jlarmour
parents: 201
diff changeset
419 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
420 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
421 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
422 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
423 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
424 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
425 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
426 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
427 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
428 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
429 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
430 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
431 { // AM29LV200-B
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
432 device_id : FLASHWORD(0x22bf),
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jlarmour
parents: 201
diff changeset
433 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
434 block_count: 4,
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jlarmour
parents: 201
diff changeset
435 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
436 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 201
diff changeset
437 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
438 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
439 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
440 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
441 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
442 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
443 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
444 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
445 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
446 },
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jlarmour
parents: 201
diff changeset
447 #endif
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jlarmour
parents: 201
diff changeset
448 #ifdef CYGHWR_DEVS_FLASH_ST_M29W200B
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jlarmour
parents: 201
diff changeset
449 { // ST M29W200BT
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jlarmour
parents: 201
diff changeset
450 device_id : FLASHWORD(0x0051),
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jlarmour
parents: 201
diff changeset
451 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
452 block_count: 4,
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jlarmour
parents: 201
diff changeset
453 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
454 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 201
diff changeset
455 bootblock : true,
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jlarmour
parents: 201
diff changeset
456 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
457 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
458 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
459 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
460 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
461 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
462 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
463 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
464 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
465 { // ST M29W200BB
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
466 device_id : FLASHWORD(0x0057),
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jlarmour
parents: 201
diff changeset
467 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
468 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
469 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
470 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 201
diff changeset
471 bootblock : true,
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jlarmour
parents: 201
diff changeset
472 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
473 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
474 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
475 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
476 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
477 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
478 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
479 banked : false
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jlarmour
parents: 201
diff changeset
480 },
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jlarmour
parents: 201
diff changeset
481 #endif
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
482 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
483 { // AM29LV320DT
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
484 device_id : FLASHWORD(0x01F6),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
485 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
486 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
487 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
488 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
489 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
490 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
491 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
492 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
493 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
494 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
495 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
496 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
497 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
498 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
499 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
500 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
501 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
502 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
503 { // AM29LV320D
434
c4fa19c99259 Improve 16as8 functionality
gthomas
parents: 363
diff changeset
504 device_id : FLASHWORD(0x22F9),
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
505 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
506 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
507 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
508 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
509 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
510 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
511 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
512 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
513 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
514 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
515 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
516 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
517 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
518 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
519 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
520 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
521 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
522 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
523 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
524 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
525 { // AM29DL324D-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
526 device_id : FLASHWORD(0x225c),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
527 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
528 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
529 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
530 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
531 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
532 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
533 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
534 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
535 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
536 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
537 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
538 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
539 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
540 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
541 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
542 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
543 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
544 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
545 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
546 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
547 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
548 { // AM29DL324D-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
549 device_id : FLASHWORD(0x225f),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
550 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
551 block_count: 64,
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
552 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
553 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
554 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
555 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
556 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
557 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
558 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
559 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
560 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
561 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
562 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
563 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
564 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
565 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
566 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
567 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
568 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
569 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
570 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
571 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
572 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
573 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
574 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
575 device_id : FLASHWORD(0x227e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
576 device_id2 : FLASHWORD(0x2202),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
577 device_id3 : FLASHWORD(0x2201),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
578 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
579 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
580 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
581 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
582 bootblock : true,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
583 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
584 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
585 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
586 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
587 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
588 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
589 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
590 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
591 0x2000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
592 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
593 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
594 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
595 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
596 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
597 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
598 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
599 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
600 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
601 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
602 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
603 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
604 banks : { 0x700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
605 0x400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
606 0x100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
607 0
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
608 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
609 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
610 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
611 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
612 { // AM29F800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
613 device_id : FLASHWORD(0x22d6),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
614 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
615 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
616 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
617 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
618 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
619 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
620 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
621 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
622 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
623 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
624 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
625 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
626 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
627 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
628 { // AM29F800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
629 device_id : FLASHWORD(0x2258),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
630 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
631 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
632 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
633 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
634 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
635 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
636 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
637 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
638 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
639 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
640 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
641 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
642 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
643 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
644 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
645 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
646 { // AM29LV800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
647 device_id : FLASHWORD(0x22da),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
648 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
649 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
650 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
651 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
652 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
653 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
654 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
655 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
656 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
657 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
658 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
659 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
660 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
661 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
662 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
663 device_id : FLASHWORD(0x225b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
664 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
665 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
666 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
667 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
668 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
669 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
670 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
671 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
672 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
673 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
674 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
675 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
676 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
677 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
678 #endif
195
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
679 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV640
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
680 { // MBM29LV640xx
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
681 device_id : FLASHWORD(0x22d7),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
682 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
683 block_count: 128,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
684 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
685 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
686 bootblock : false,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
687 banked : false
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
688 },
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
689 #endif
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
690 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
691 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
692 device_id : FLASHWORD(0xCE),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
693 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
694 block_count: 16,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
695 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
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696 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
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697 bootblock : true,
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698 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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699 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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700 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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701 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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702 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
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703 _LAST_BOOTBLOCK
201
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704 },
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705 banked : false
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706 },
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707 #endif
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708
161
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709 #endif // 16 bit devices
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710
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711 #endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL