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annotate packages/hal/arm/pid/current/src/pid_misc.c @ 2729:74dbf4c3f2e1 after-copyright-change-20090129
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| author | jlarmour |
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| date | Thu, 29 Jan 2009 17:47:46 +0000 |
| parents | d2c90368aeef |
| children |
| rev | line source |
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| 2 | 1 //========================================================================== |
| 2 // | |
| 3 // pid_misc.c | |
| 4 // | |
| 5 // HAL misc board support code for ARM PID7 | |
| 6 // | |
| 7 //========================================================================== | |
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8 // ####ECOSGPLCOPYRIGHTBEGIN#### |
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9 // ------------------------------------------- |
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10 // This file is part of eCos, the Embedded Configurable Operating System. |
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11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
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12 // |
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13 // eCos is free software; you can redistribute it and/or modify it under |
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14 // the terms of the GNU General Public License as published by the Free |
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15 // Software Foundation; either version 2 or (at your option) any later |
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16 // version. |
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17 // |
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18 // eCos is distributed in the hope that it will be useful, but WITHOUT |
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19 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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21 // for more details. |
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22 // |
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23 // You should have received a copy of the GNU General Public License |
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24 // along with eCos; if not, write to the Free Software Foundation, Inc., |
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25 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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26 // |
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27 // As a special exception, if other files instantiate templates or use |
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28 // macros or inline functions from this file, or you compile this file |
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29 // and link it with other works to produce a work based on this file, |
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30 // this file does not by itself cause the resulting work to be covered by |
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31 // the GNU General Public License. However the source code for this file |
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32 // must still be made available in accordance with section (3) of the GNU |
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33 // General Public License v2. |
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34 // |
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35 // This exception does not invalidate any other reasons why a work based |
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36 // on this file might be covered by the GNU General Public License. |
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37 // ------------------------------------------- |
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38 // ####ECOSGPLCOPYRIGHTEND#### |
| 2 | 39 //========================================================================== |
| 40 //#####DESCRIPTIONBEGIN#### | |
| 41 // | |
| 42 // Author(s): gthomas | |
| 43 // Contributors: gthomas | |
| 44 // Date: 1999-02-20 | |
| 45 // Purpose: HAL board support | |
| 46 // Description: Implementations of HAL board interfaces | |
| 47 // | |
| 48 //####DESCRIPTIONEND#### | |
| 49 // | |
| 50 //===========================================================================*/ | |
| 51 | |
| 52 #include <pkgconf/hal.h> | |
| 53 | |
| 54 #include <cyg/infra/cyg_type.h> // base types | |
| 55 #include <cyg/infra/cyg_trac.h> // tracing macros | |
| 56 #include <cyg/infra/cyg_ass.h> // assertion macros | |
| 57 | |
| 58 #include <cyg/hal/hal_io.h> // IO macros | |
| 59 #include <cyg/hal/hal_arch.h> // Register state info | |
| 60 #include <cyg/hal/hal_diag.h> | |
| 61 #include <cyg/hal/hal_intr.h> // necessary? | |
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62 #include <cyg/hal/hal_if.h> // calling interface |
| 2 | 63 |
| 64 /*------------------------------------------------------------------------*/ | |
| 65 // On-board timer | |
| 66 /*------------------------------------------------------------------------*/ | |
| 67 | |
| 68 // Timer registers | |
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69 #define CYG_DEVICE_TIMER1_BASE 0x0A800020 |
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70 #define CYG_DEVICE_TIMER1_LOAD \ |
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71 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x00)) |
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72 // Load value, read/write |
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73 #define CYG_DEVICE_TIMER1_CURRENT \ |
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74 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x04)) |
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75 // Current value, read |
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76 #define CYG_DEVICE_TIMER1_CONTROL \ |
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77 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x08)) |
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78 // Control register, read/write |
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79 #define CYG_DEVICE_TIMER1_CLEAR \ |
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80 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER1_BASE + 0x0C)) |
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81 // Clears interrrupt, write only |
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82 |
| 2 | 83 #define CYG_DEVICE_TIMER_BASE 0x0A800020 |
| 84 #define CYG_DEVICE_TIMER_LOAD \ | |
| 85 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x00)) | |
| 86 // Load value, read/write | |
| 87 #define CYG_DEVICE_TIMER_CURRENT \ | |
| 88 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x04)) | |
| 89 // Current value, read | |
| 90 #define CYG_DEVICE_TIMER_CONTROL \ | |
| 91 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x08)) | |
| 92 // Control register, read/write | |
| 93 #define CYG_DEVICE_TIMER_CLEAR \ | |
| 94 ((volatile cyg_uint32 *) (CYG_DEVICE_TIMER_BASE + 0x0C)) | |
| 95 // Clears interrrupt, write only | |
| 96 | |
| 97 // Clock/timer control register | |
| 98 #define CTL_ENABLE 0x80 // Bit 7: 1 - counter enabled | |
| 99 #define CTL_DISABLE 0x00 // 0 - counter disabled | |
| 100 #define CTL_FREERUN 0x00 // Bit 6: 0 - free running counter | |
| 101 #define CTL_PERIODIC 0x40 // 1 - periodic timer mode | |
| 102 #define CTL_SCALE_1 0x00 // Bits 32: 00 - Scale clock by 1 | |
| 103 #define CTL_SCALE_16 0x04 // 01 - Scale by 16 | |
| 104 #define CTL_SCALE_256 0x08 // 10 - Scale by 256 | |
| 105 // 12.8us/tick | |
| 106 | |
| 107 // Interrupt controller registers | |
| 108 #define CYG_DEVICE_ICTL_BASE 0x0A000000 | |
| 109 #define CYG_DEVICE_IRQ_Status \ | |
| 110 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x00)) | |
| 111 // Current status, read only | |
| 112 #define CYG_DEVICE_IRQ_Enable \ | |
| 113 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) | |
| 114 // Enable status, read only | |
| 115 #define CYG_DEVICE_IRQ_EnableSet \ | |
| 116 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x08)) | |
| 117 // Enable (1's only), write only | |
| 118 #define CYG_DEVICE_IRQ_EnableClear \ | |
| 119 ((volatile cyg_uint32 *) (CYG_DEVICE_ICTL_BASE + 0x0C)) | |
| 120 // Disable (1's only), write only | |
| 121 | |
| 122 static cyg_uint32 _period; | |
| 123 | |
| 124 void hal_clock_initialize(cyg_uint32 period) | |
| 125 { | |
| 126 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, period); | |
| 127 //diag_printf("psr = %x\n", psr()); | |
| 128 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, CTL_DISABLE); // Turn off | |
| 129 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_LOAD, period); | |
| 130 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CONTROL, | |
| 131 CTL_ENABLE | CTL_PERIODIC | CTL_SCALE_16); | |
| 132 _period = period; | |
| 133 } | |
| 134 | |
| 135 void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period) | |
| 136 { | |
| 137 //diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); | |
| 138 HAL_WRITE_UINT32(CYG_DEVICE_TIMER_CLEAR, 0); | |
| 139 _period = period; | |
| 140 } | |
| 141 | |
| 142 void hal_clock_read(cyg_uint32 *pvalue) | |
| 143 { | |
| 144 cyg_uint32 value; | |
| 145 // diag_init(); diag_printf("%s\n", __PRETTY_FUNCTION__); | |
| 146 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value); | |
| 147 value &= 0xFFFF; | |
| 148 *pvalue = _period - (value & 0xFFFF); // Note: counter is only 16 bits | |
| 149 // and decreases | |
| 150 } | |
| 151 | |
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152 // ------------------------------------------------------------------------- |
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153 // |
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154 // Delay for some number of micro-seconds |
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155 // |
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156 void hal_delay_us(cyg_int32 usecs) |
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157 { |
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158 cyg_uint32 value; |
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159 cyg_uint64 ticks = ((usecs*CYGNUM_HAL_RTC_PERIOD*CYGNUM_HAL_RTC_DENOMINATOR)/1000000); |
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160 |
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161 HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL, CTL_DISABLE); // Turn off |
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162 HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_LOAD, ticks); |
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163 HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL, |
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164 CTL_ENABLE | CTL_FREERUN | CTL_SCALE_16); |
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165 |
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166 // Wait for timer to underflow |
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167 do { |
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168 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, value); |
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169 value &= 0xFFFF; |
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170 } while (value < 0x7fff); |
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171 |
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172 HAL_WRITE_UINT32(CYG_DEVICE_TIMER1_CONTROL, CTL_DISABLE); // Turn off |
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173 } |
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174 |
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175 // ------------------------------------------------------------------------- |
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176 |
| 2 | 177 void hal_hardware_init(void) |
| 178 { | |
| 179 // Any hardware/platform initialization that needs to be done. | |
| 180 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 0xFFFF); // Clear all | |
| 181 // interrupt sources | |
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182 // Set up eCos/ROM interfaces |
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183 hal_if_init(); |
| 2 | 184 } |
| 185 | |
| 186 // | |
| 187 // This routine is called to respond to a hardware interrupt (IRQ). It | |
| 188 // should interrogate the hardware and return the IRQ vector number. | |
| 189 | |
| 190 int hal_IRQ_handler(void) | |
| 191 { | |
| 192 // Do hardware-level IRQ handling | |
| 193 int irq_status, vector; | |
| 194 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); | |
| 195 //diag_init(); diag_printf("%s, status: %x\n", __PRETTY_FUNCTION__, irq_status); | |
| 196 for (vector = 1; vector < 16; vector++) { | |
| 197 if (irq_status & (1<<vector)) return vector; | |
| 198 } | |
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199 return CYGNUM_HAL_INTERRUPT_NONE; // This shouldn't happen! |
| 2 | 200 } |
| 201 | |
| 202 // | |
| 203 // Interrupt control | |
| 204 // | |
| 205 | |
| 206 void hal_interrupt_mask(int vector) | |
| 207 { | |
| 208 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 209 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableClear, 1<<vector); | |
| 210 } | |
| 211 | |
| 212 #if 0 | |
| 213 void hal_interrupt_status(void) | |
| 214 { | |
| 215 int irq_status, irq_enable, timer_status, timer_value, timer_load; | |
| 216 HAL_READ_UINT32(CYG_DEVICE_IRQ_Status, irq_status); | |
| 217 HAL_READ_UINT32(CYG_DEVICE_IRQ_Enable, irq_enable); | |
| 218 HAL_READ_UINT32(CYG_DEVICE_TIMER_LOAD, timer_load); | |
| 219 HAL_READ_UINT32(CYG_DEVICE_TIMER_CURRENT, timer_value); | |
| 220 HAL_READ_UINT32(CYG_DEVICE_TIMER_CONTROL, timer_status); | |
| 221 diag_printf("Interrupt: IRQ: %x.%x, TIMER: %x.%x.%x, psr: %x\n", | |
| 222 irq_status, irq_enable, timer_status, timer_value, | |
| 223 timer_load, psr()); | |
| 224 } | |
| 225 #endif | |
| 226 | |
| 227 void hal_interrupt_unmask(int vector) | |
| 228 { | |
| 229 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 230 HAL_WRITE_UINT32(CYG_DEVICE_IRQ_EnableSet, 1<<vector); | |
| 231 } | |
| 232 | |
| 233 void hal_interrupt_acknowledge(int vector) | |
| 234 { | |
| 235 //diag_init(); diag_printf("%s(%d)\n", __PRETTY_FUNCTION__, vector); | |
| 236 } | |
| 237 | |
| 238 void hal_interrupt_configure(int vector, int level, int up) | |
| 239 { | |
| 240 //diag_init(); diag_printf("%s(%d,%d,%d)\n", __PRETTY_FUNCTION__, vector, level, up); | |
| 241 } | |
| 242 | |
| 243 void hal_interrupt_set_level(int vector, int level) | |
| 244 { | |
| 245 //diag_init(); diag_printf("%s(%d,%d)\n", __PRETTY_FUNCTION__, vector, level); | |
| 246 } | |
| 247 | |
| 248 void hal_show_IRQ(int vector, int data, int handler) | |
| 249 { | |
| 250 // diag_printf("IRQ - vector: %x, data: %x, handler: %x\n", vector, data, handler); | |
| 251 } | |
|
50
a0774359f013
Merge from eCos master repository on 1999-11-02-17:02:15-GMT
jlarmour
parents:
2
diff
changeset
|
252 |
| 2 | 253 /*---------------------------------------------------------------------------*/ |
| 254 /* End of hal_misc.c */ |