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annotate packages/hal/mn10300/arch/current/include/hal_cache.h @ 1777:c16341b1bac6 default tip
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| author | alexs |
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| date | Mon, 12 Oct 2009 02:26:09 +0100 |
| parents | d2c90368aeef |
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| rev | line source |
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| 0 | 1 #ifndef CYGONCE_HAL_CACHE_H |
| 2 #define CYGONCE_HAL_CACHE_H | |
| 3 | |
| 4 //============================================================================= | |
| 5 // | |
| 2 | 6 // hal_cache.h |
| 0 | 7 // |
| 2 | 8 // HAL cache control API |
| 0 | 9 // |
| 10 //============================================================================= | |
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11 //####ECOSGPLCOPYRIGHTBEGIN#### |
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12 // ------------------------------------------- |
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13 // This file is part of eCos, the Embedded Configurable Operating System. |
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14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. |
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15 // |
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16 // eCos is free software; you can redistribute it and/or modify it under |
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17 // the terms of the GNU General Public License as published by the Free |
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18 // Software Foundation; either version 2 or (at your option) any later version. |
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19 // |
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY |
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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23 // for more details. |
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24 // |
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25 // You should have received a copy of the GNU General Public License along |
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26 // with eCos; if not, write to the Free Software Foundation, Inc., |
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
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28 // |
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29 // As a special exception, if other files instantiate templates or use macros |
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30 // or inline functions from this file, or you compile this file and link it |
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31 // with other works to produce a work based on this file, this file does not |
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32 // by itself cause the resulting work to be covered by the GNU General Public |
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33 // License. However the source code for this file must still be made available |
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34 // in accordance with section (3) of the GNU General Public License. |
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35 // |
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36 // This exception does not invalidate any other reasons why a work based on |
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37 // this file might be covered by the GNU General Public License. |
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38 // |
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. |
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40 // at http://sources.redhat.com/ecos/ecos-license/ |
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41 // ------------------------------------------- |
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42 //####ECOSGPLCOPYRIGHTEND#### |
| 0 | 43 //============================================================================= |
| 44 //#####DESCRIPTIONBEGIN#### | |
| 45 // | |
| 2 | 46 // Author(s): nickg |
| 47 // Contributors: nickg | |
| 48 // Date: 1998-02-17 | |
| 49 // Purpose: Cache control API | |
| 50 // Description: The macros defined here provide the HAL APIs for handling | |
| 0 | 51 // cache control operations. |
| 52 // Usage: | |
| 2 | 53 // #include <cyg/hal/hal_cache.h> |
| 54 // ... | |
| 55 // | |
| 0 | 56 // |
| 57 //####DESCRIPTIONEND#### | |
| 58 // | |
| 59 //============================================================================= | |
| 60 | |
| 2 | 61 #include <pkgconf/hal.h> |
| 0 | 62 #include <cyg/infra/cyg_type.h> |
| 63 | |
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64 #if !defined(CYG_HAL_MN10300_AM31_SIM) |
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66 #include <cyg/hal/var_cache.h> |
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68 #else |
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69 |
| 0 | 70 //============================================================================= |
| 71 // MN10300 Simulator | |
| 72 | |
| 73 //----------------------------------------------------------------------------- | |
| 74 // Cache dimensions | |
| 75 | |
| 76 // Data cache | |
| 77 #define HAL_DCACHE_SIZE 4096 // Size of data cache in bytes | |
| 78 #define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line | |
| 79 #define HAL_DCACHE_WAYS 2 // Associativity of the cache | |
| 80 | |
| 81 // Instruction cache | |
| 82 #define HAL_ICACHE_SIZE 4096 // Size of cache in bytes | |
| 83 #define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line | |
| 84 #define HAL_ICACHE_WAYS 2 // Associativity of the cache | |
| 85 | |
| 86 #define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) | |
| 87 #define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) | |
| 88 | |
| 89 //----------------------------------------------------------------------------- | |
| 90 // Global control of data cache | |
| 91 | |
| 92 // Enable the data cache | |
| 93 #define HAL_DCACHE_ENABLE() | |
| 94 | |
| 95 // Disable the data cache | |
| 96 #define HAL_DCACHE_DISABLE() | |
| 97 | |
| 98 // Invalidate the entire cache | |
| 99 #define HAL_DCACHE_INVALIDATE_ALL() | |
| 100 | |
| 101 // Synchronize the contents of the cache with memory. | |
| 102 #define HAL_DCACHE_SYNC() | |
| 103 | |
| 104 // Set the data cache refill burst size | |
| 105 //#define HAL_DCACHE_BURST_SIZE(_size_) | |
| 106 | |
| 107 // Set the data cache write mode | |
| 108 //#define HAL_DCACHE_WRITE_MODE( _mode_ ) | |
| 109 | |
| 110 // Load the contents of the given address range into the data cache | |
| 111 // and then lock the cache so that it stays there. | |
| 112 //#define HAL_DCACHE_LOCK(_base_, _size_) | |
| 113 | |
| 114 // Undo a previous lock operation | |
| 115 //#define HAL_DCACHE_UNLOCK(_base_, _size_) | |
| 116 | |
| 2 | 117 // Unlock entire cache |
| 118 //#define HAL_DCACHE_UNLOCK_ALL() | |
| 119 | |
| 0 | 120 //----------------------------------------------------------------------------- |
| 121 // Data cache line control | |
| 122 | |
| 123 // Allocate cache lines for the given address range without reading its | |
| 124 // contents from memory. | |
| 125 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ ) | |
| 126 | |
| 127 // Write dirty cache lines to memory and invalidate the cache entries | |
| 128 // for the given address range. | |
| 129 //#define HAL_DCACHE_FLUSH( _base_ , _size_ ) | |
| 130 | |
| 131 // Invalidate cache lines in the given range without writing to memory. | |
| 132 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ ) | |
| 133 | |
| 134 // Write dirty cache lines to memory for the given address range. | |
| 135 //#define HAL_DCACHE_STORE( _base_ , _size_ ) | |
| 136 | |
| 137 // Preread the given range into the cache with the intention of reading | |
| 138 // from it later. | |
| 139 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ ) | |
| 140 | |
| 141 // Preread the given range into the cache with the intention of writing | |
| 142 // to it later. | |
| 143 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ ) | |
| 144 | |
| 145 // Allocate and zero the cache lines associated with the given range. | |
| 146 //#define HAL_DCACHE_ZERO( _base_ , _size_ ) | |
| 147 | |
| 148 //----------------------------------------------------------------------------- | |
| 149 // Global control of Instruction cache | |
| 150 | |
| 151 // Enable the instruction cache | |
| 152 #define HAL_ICACHE_ENABLE() | |
| 153 | |
| 154 // Disable the instruction cache | |
| 155 #define HAL_ICACHE_DISABLE() | |
| 156 | |
| 157 // Invalidate the entire cache | |
| 158 #define HAL_ICACHE_INVALIDATE_ALL() | |
| 159 | |
| 160 // Synchronize the contents of the cache with memory. | |
| 161 #define HAL_ICACHE_SYNC() | |
| 162 | |
| 163 // Set the instruction cache refill burst size | |
| 164 //#define HAL_ICACHE_BURST_SIZE(_size_) | |
| 165 | |
| 166 // Load the contents of the given address range into the instruction cache | |
| 167 // and then lock the cache so that it stays there. | |
| 168 //#define HAL_ICACHE_LOCK(_base_, _size_) | |
| 169 | |
| 170 // Undo a previous lock operation | |
| 171 //#define HAL_ICACHE_UNLOCK(_base_, _size_) | |
| 172 | |
| 2 | 173 // Unlock entire cache |
| 174 //#define HAL_ICACHE_UNLOCK_ALL() | |
| 175 | |
| 0 | 176 //----------------------------------------------------------------------------- |
| 177 // Instruction cache line control | |
| 178 | |
| 179 // Invalidate cache lines in the given range without writing to memory. | |
| 180 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ ) | |
| 181 | |
| 182 #endif | |
| 183 | |
| 184 | |
| 2 | 185 //----------------------------------------------------------------------------- |
| 186 // Check that a supported configuration has actually defined some macros. | |
| 187 | |
| 188 #ifndef HAL_DCACHE_ENABLE | |
| 189 | |
| 190 #error Unsupported MN10300 configuration | |
| 191 | |
| 192 #endif | |
| 0 | 193 |
| 194 //----------------------------------------------------------------------------- | |
| 195 #endif // ifndef CYGONCE_HAL_CACHE_H | |
| 196 // End of hal_cache.h |
