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annotate packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @ 1164:2fe7cd7dffaa

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Add support for the AM29PL160. Allow platform-specific code to override the default loop counts used for various timeouts.
author bartv
date Sun, 17 Aug 2003 18:25:49 +0000
parents 50e2b50c6ea7
children de0f96386f4f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #ifndef CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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2 #define CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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3 //==========================================================================
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4 //
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5 // am29xxxxx_parts.inl
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6 //
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7 // AMD AM29xxxxx part descriptors
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8 //
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9 //==========================================================================
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10 //####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 // Copyright (C) 2002 Gary Thomas
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15 //
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16 // eCos is free software; you can redistribute it and/or modify it under
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17 // the terms of the GNU General Public License as published by the Free
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18 // Software Foundation; either version 2 or (at your option) any later version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License along
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26 // with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use macros
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30 // or inline functions from this file, or you compile this file and link it
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31 // with other works to produce a work based on this file, this file does not
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32 // by itself cause the resulting work to be covered by the GNU General Public
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33 // License. However the source code for this file must still be made available
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34 // in accordance with section (3) of the GNU General Public License.
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35 //
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36 // This exception does not invalidate any other reasons why a work based on
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37 // this file might be covered by the GNU General Public License.
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38 //
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39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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40 // at http://sources.redhat.com/ecos/ecos-license/
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41 // -------------------------------------------
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42 //####ECOSGPLCOPYRIGHTEND####
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43 //==========================================================================
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44 //#####DESCRIPTIONBEGIN####
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45 //
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46 // Author(s): jskov
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47 // Contributors: jskov, Koichi Nagashima
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48 // Date: 2001-06-08
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49 // Purpose:
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50 // Description: AMD AM29xxxxx part descriptors
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51 // Usage: Should be included from the flash_am29xxxxx.inl file only.
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52 //
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53 // FIXME: Add configury for selecting bottom/top bootblocks
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54 //####DESCRIPTIONEND####
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55 //
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56 //==========================================================================
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57
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58 //
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59 // Note: 'bootblocks' are a set of blocks which are treated by
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60 // the driver as a single larger block. This simplifies the driver
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61 // so as to only have to deal with single size blocks (even though
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62 // the physical device may differ). The data structure is laid out as:
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63 // <address of start of boot block area 1>
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64 // <size of sub-block 1>
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65 // <size of sub-block 2>
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66 // ...
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67 // <size of sub-block n>
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68 // <address of start of boot block area 2>
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69 // <size of sub-block 1>
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70 // <size of sub-block 2>
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71 // ...
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72 // <size of sub-block n>
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73 // _LAST_BOOTBLOCK
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74 //
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75 // Finally, when specifying a device with bootblocks, the total number
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76 // of blocks should reflect this collapse, i.e. if the device has 15
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77 // full size blocks and 8 blocks which are 1/8 each, then the total
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78 // should be 16 blocks.
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79 //
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80 #define _LAST_BOOTBLOCK (-1)
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81
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82 #if CYGNUM_FLASH_WIDTH == 8
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83 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F040B
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84 { // AM29F040B
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85 device_id : FLASHWORD(0xa4),
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86 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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87 block_count: 8,
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88 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
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89 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
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90 bootblock : false,
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91 banked : false
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92 },
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93 #endif
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94 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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95 { // MBM29LV160-T | AM29LV160-T
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96 device_id : FLASHWORD(0xc4),
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97 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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98 block_count: 32,
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99 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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100 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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101 bootblock : true,
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102 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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103 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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104 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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105 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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106 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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107 _LAST_BOOTBLOCK
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108 },
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109 banked : false
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110 },
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111 { // MBM29LV160-B | AM29LV160-B
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112 device_id : FLASHWORD(0x49),
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113 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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114 block_count: 32,
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115 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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116 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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117 bootblock : true,
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118 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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119 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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120 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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121 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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122 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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123 _LAST_BOOTBLOCK
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124 },
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125 banked : false
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126 },
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127 #endif
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128 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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129 { // AM29LV200-T
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130 device_id : FLASHWORD(0x3b),
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131 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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132 block_count: 4,
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133 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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134 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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135 bootblock : true,
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136 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
137 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
138 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
139 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
140 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
141 _LAST_BOOTBLOCK
208
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jlarmour
parents: 201
diff changeset
142 },
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jlarmour
parents: 201
diff changeset
143 banked : false
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jlarmour
parents: 201
diff changeset
144 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
145 { // AM29LV200-B
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jlarmour
parents: 201
diff changeset
146 device_id : FLASHWORD(0xbf),
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parents: 201
diff changeset
147 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
148 block_count: 4,
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jlarmour
parents: 201
diff changeset
149 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
150 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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jlarmour
parents: 201
diff changeset
151 bootblock : true,
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parents: 201
diff changeset
152 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
153 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
154 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
155 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents: 201
diff changeset
156 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
157 _LAST_BOOTBLOCK
208
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jlarmour
parents: 201
diff changeset
158 },
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jlarmour
parents: 201
diff changeset
159 banked : false
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jlarmour
parents: 201
diff changeset
160 },
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parents: 201
diff changeset
161 #endif
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
162 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
6a3479d240be Update for 320D. Support cache flush/disable
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parents: 210
diff changeset
163 { // AM29LV320DT
6a3479d240be Update for 320D. Support cache flush/disable
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parents: 210
diff changeset
164 device_id : FLASHWORD(0xF6),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
165 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
166 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
167 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
168 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
169 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
170 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
171 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
172 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
173 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
174 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
175 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
176 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
177 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
178 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
179 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
180 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
181 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
182 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
183 { // AM29LV320D
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
184 device_id : FLASHWORD(0xF9),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
185 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
186 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
187 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
188 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
189 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
190 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
191 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
192 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
193 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
194 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
195 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
196 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
197 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
198 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
199 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
200 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
201 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
202 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
203 #endif
450
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
204 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL322D
4dbb32159a9c AM29DL322 Support
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parents: 434
diff changeset
205 { // AM29DL322D-T
4dbb32159a9c AM29DL322 Support
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parents: 434
diff changeset
206 device_id : FLASHWORD(0x55),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
207 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
208 block_count: 64,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
209 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
210 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
211 bootblock : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
212 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
213 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
214 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
215 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
216 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
217 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
218 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
219 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
220 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
221 _LAST_BOOTBLOCK
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
222 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
223 banked : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
224 banks : { 0x380000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
225 0
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
226 }
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
227 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
228 { // AM29DL322D-B
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
229 device_id : FLASHWORD(0x56),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
230 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
231 block_count: 64,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
232 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
233 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
234 bootblock : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
235 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
236 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
237 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
238 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
239 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
240 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
241 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
242 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
243 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
244 _LAST_BOOTBLOCK
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
245 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
246 banked : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
247 banks : { 0x80000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
248 0
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
249 }
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
250 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
251 #endif
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
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parents: 450
diff changeset
252 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL323D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
253 { // AM29DL323D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
254 device_id : FLASHWORD(0x50),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
255 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
256 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
257 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
258 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
259 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
260 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
261 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
262 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
263 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
264 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
265 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
266 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
267 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
268 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
269 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
270 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
271 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
272 banks : { 0x300000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
273 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
274 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
275 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
276 { // AM29DL323D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
277 device_id : FLASHWORD(0x53),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
278 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
279 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
280 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
281 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
282 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
283 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
284 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
285 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
286 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
287 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
288 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
289 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
290 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
291 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
292 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
293 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
294 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
295 banks : { 0x100000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
296 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
297 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
298 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
299 #endif
161
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jlarmour
parents:
diff changeset
300 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
301 { // AM29DL324D-T
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jlarmour
parents:
diff changeset
302 device_id : FLASHWORD(0x5c),
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jlarmour
parents:
diff changeset
303 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
304 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
305 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
306 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
307 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
308 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
309 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
310 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
311 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
312 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
313 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
314 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
315 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
316 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
317 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
318 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
319 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
320 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
321 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
322 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
323 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
324 { // AM29DL324D-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
325 device_id : FLASHWORD(0x5f),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
326 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
327 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
328 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
329 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
330 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
331 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
332 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
333 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
334 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
335 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
336 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
337 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
338 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
339 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
340 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
341 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
342 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
343 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
344 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
345 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
346 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
347 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
348 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
349 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
350 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
351 device_id : FLASHWORD(0x7e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
352 device_id2 : FLASHWORD(0x02),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
353 device_id3 : FLASHWORD(0x01),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
354 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
355 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
356 device_size: 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
357 base_mask : ~(0x8000000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
358 bootblock : true,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
359 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
360 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
361 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
362 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
363 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
364 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
365 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
366 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
367 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
368 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
369 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
370 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
371 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
372 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
373 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
374 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
375 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
376 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
377 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
378 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
379 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
380 banks : { 0x0700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
381 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
382 0x0100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
383 0
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
384 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
385 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
386 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
387 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
388 { // AM29F800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
389 device_id : FLASHWORD(0xd6),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
390 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
391 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
392 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
393 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
394 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
395 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
396 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
397 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
398 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
399 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
400 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
401 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
402 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
403 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
404 { // AM29F800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
405 device_id : FLASHWORD(0x58),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
406 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
407 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
408 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
409 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
410 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
411 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
412 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
413 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
414 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
415 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
416 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
417 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
418 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
419 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
420 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
421 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
422 { // AM29LV800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
423 device_id : FLASHWORD(0xda),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
424 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
425 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
426 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
427 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
428 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
429 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
430 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
431 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
432 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
433 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
434 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
435 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
436 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
437 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
438 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
439 device_id : FLASHWORD(0x5b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
440 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
441 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
442 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
443 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
444 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
445 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
446 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
447 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
448 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
449 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
450 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
451 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
452 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
453 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
454 #endif
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
455 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
456 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
457 device_id : FLASHWORD(0xCE),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
458 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
459 block_count: 16,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
460 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
461 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
462 bootblock : true,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
463 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
464 0x004000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
465 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
466 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
467 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
468 _LAST_BOOTBLOCK
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
469 },
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
470 banked : false
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
471 },
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
472 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
473
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
474 #else // 16 bit devices
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
475
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
476 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
477 { // MBM29LV160-T | AM29LV160-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
478 device_id : FLASHWORD(0x22c4),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
479 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
480 block_count: 32,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
481 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
482 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
483 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
484 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
485 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
486 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
487 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
488 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
489 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
490 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
491 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
492 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
493 { // MBM29LV160-B | AM29LV160-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
494 device_id : FLASHWORD(0x2249),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
495 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
496 block_count: 32,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
497 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
498 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
499 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
500 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
501 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
502 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
503 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
504 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
505 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
506 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
507 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
508 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
509 #endif
1164
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
510 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29PL160
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
511 { // AM29PL160
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
512 device_id : FLASHWORD(0x2245),
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
513 block_size : 0x00040000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
514 block_count: 8,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
515 device_size: 0x00200000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
516 base_mask : ~(0x00200000 * CYGNUM_FLASH_INTERLEAVE - 1),
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
517 bootblock : true,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
518 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
519 0x004000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
520 0x002000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
521 0x002000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
522 0x038000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
523 _LAST_BOOTBLOCK
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
524 },
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
525 banked : false
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
526 },
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
527 #endif
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
528 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
529 { // AM29LV200-T
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
530 device_id : FLASHWORD(0x223b),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
531 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
532 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
533 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
534 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
535 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
536 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
537 0x008000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
538 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
539 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
540 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
541 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
542 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
543 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
544 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
545 { // AM29LV200-B
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
546 device_id : FLASHWORD(0x22bf),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
547 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
548 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
549 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
550 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
551 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
552 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
553 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
554 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
555 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
556 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
557 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
558 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
559 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
560 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
561 #endif
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
562 #ifdef CYGHWR_DEVS_FLASH_ST_M29W200B
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
563 { // ST M29W200BT
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
564 device_id : FLASHWORD(0x0051),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
565 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
566 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
567 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
568 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
569 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
570 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
571 0x008000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
572 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
573 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
574 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
575 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
576 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
577 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
578 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
579 { // ST M29W200BB
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
580 device_id : FLASHWORD(0x0057),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
581 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
582 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
583 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
584 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
585 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
586 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
587 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
588 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
589 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
590 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
591 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
592 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
593 banked : false
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
594 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
595 #endif
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
596 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
597 { // AM29LV320DT
587
98fc8f919755 Fix ID code for AM29LV320DT
gthomas
parents: 523
diff changeset
598 device_id : FLASHWORD(0x22F6),
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
599 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
600 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
601 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
602 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
603 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
604 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
605 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
606 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
607 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
608 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
609 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
610 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
611 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
612 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
613 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
614 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
615 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
616 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
617 { // AM29LV320D
434
c4fa19c99259 Improve 16as8 functionality
gthomas
parents: 363
diff changeset
618 device_id : FLASHWORD(0x22F9),
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
619 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
620 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
621 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
622 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
623 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
624 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
625 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
626 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
627 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
628 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
629 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
630 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
631 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
632 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
633 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
634 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
635 banked : false
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
636 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
637 #endif
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
638 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL322D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
639 { // AM29DL322D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
640 device_id : FLASHWORD(0x2255),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
641 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
642 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
643 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
644 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
645 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
646 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
647 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
648 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
649 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
650 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
651 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
652 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
653 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
654 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
655 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
656 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
657 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
658 banks : { 0x380000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
659 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
660 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
661 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
662 { // AM29DL322D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
663 device_id : FLASHWORD(0x2256),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
664 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
665 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
666 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
667 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
668 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
669 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
670 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
671 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
672 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
673 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
674 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
675 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
676 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
677 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
678 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
679 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
680 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
681 banks : { 0x80000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
682 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
683 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
684 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
685 #endif
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
686 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL323D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
687 { // AM29DL323D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
688 device_id : FLASHWORD(0x2250),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
689 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
690 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
691 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
692 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
693 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
694 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
695 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
696 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
697 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
698 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
699 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
700 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
701 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
702 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
703 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
704 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
705 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
706 banks : { 0x300000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
707 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
708 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
709 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
710 { // AM29DL323D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
711 device_id : FLASHWORD(0x2253),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
712 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
713 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
714 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
715 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
716 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
717 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
718 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
719 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
720 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
721 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
722 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
723 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
724 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
725 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
726 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
727 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
728 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
729 banks : { 0x100000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
730 0
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
731 }
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
732 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
733 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
734 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
735 { // AM29DL324D-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
736 device_id : FLASHWORD(0x225c),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
737 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
738 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
739 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
740 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
741 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
742 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
743 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
744 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
745 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
746 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
747 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
748 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
749 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
750 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
751 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
752 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
753 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
754 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
755 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
756 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
757 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
758 { // AM29DL324D-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
759 device_id : FLASHWORD(0x225f),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
760 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
761 block_count: 64,
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
762 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
763 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
764 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
765 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
766 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
767 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
768 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
769 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
770 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
771 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
772 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
773 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
774 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
775 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
776 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
777 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
778 0
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
779 }
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
780 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
781 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
782 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
783 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
784 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
785 device_id : FLASHWORD(0x227e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
786 device_id2 : FLASHWORD(0x2202),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
787 device_id3 : FLASHWORD(0x2201),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
788 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
789 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
790 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
791 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
792 bootblock : true,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
793 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
794 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
795 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
796 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
797 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
798 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
799 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
800 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
801 0x2000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
802 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
803 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
804 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
805 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
806 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
807 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
808 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
809 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
810 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
811 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
812 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
813 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
814 banks : { 0x700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
815 0x400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
816 0x100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
817 0
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
818 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
819 }
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
820 #endif
1132
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
821 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV400
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
822 { // AM29LV400-T
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
823 device_id : FLASHWORD(0x22b9),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
824 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
825 block_count: 8,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
826 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
827 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
828 bootblock : true,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
829 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
830 0x08000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
831 0x02000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
832 0x02000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
833 0x04000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
834 _LAST_BOOTBLOCK
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
835 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
836 banked : false
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
837 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
838 { // AM29LV400-B
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
839 device_id : FLASHWORD(0x22ba),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
840 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
841 block_count: 8,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
842 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
843 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
844 bootblock : true,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
845 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
846 0x004000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
847 0x002000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
848 0x002000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
849 0x008000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
850 _LAST_BOOTBLOCK
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
851 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
852 banked : false
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
853 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
854 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
855 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
856 { // AM29F800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
857 device_id : FLASHWORD(0x22d6),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
858 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
859 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
860 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
861 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
862 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
863 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
864 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
865 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
866 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
867 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
868 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
869 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
870 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
871 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
872 { // AM29F800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
873 device_id : FLASHWORD(0x2258),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
874 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
875 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
876 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
877 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
878 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
879 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
880 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
881 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
882 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
883 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
884 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
885 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
886 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
887 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
888 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
889 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
890 { // AM29LV800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
891 device_id : FLASHWORD(0x22da),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
892 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
893 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
894 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
895 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
896 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
897 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
898 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
899 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
900 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
901 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
902 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
903 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
904 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
905 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
906 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
907 device_id : FLASHWORD(0x225b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
908 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
909 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
910 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
911 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
912 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
913 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
914 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
915 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
916 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
917 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
918 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
919 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
920 banked : false
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
921 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
922 #endif
195
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
923 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV640
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
924 { // MBM29LV640xx
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
925 device_id : FLASHWORD(0x22d7),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
926 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
927 block_count: 128,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
928 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
929 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
930 bootblock : false,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
931 banked : false
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
932 },
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
933 #endif
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
934 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
935 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
936 device_id : FLASHWORD(0xCE),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
937 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
938 block_count: 16,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
939 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
940 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
941 bootblock : true,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
942 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
943 0x004000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
944 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
945 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
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946 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
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947 _LAST_BOOTBLOCK
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948 },
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jlarmour
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949 banked : false
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jlarmour
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950 },
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951 #endif
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952
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953 #endif // 16 bit devices
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954
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jlarmour
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955 #endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL