flash_v2: packages/hal/sh/sh4/current/cdl/hal_sh

annotate packages/hal/sh/sh4/current/cdl/hal_sh_sh4.cdl @ 1424:5268028c09c4

2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> * src/var_misc.c (hal_variant_init): Set FPSCR on startup. * src/sh4_scif.c (cyg_hal_plf_scif_set_baud): New function, taken from init code, but with fix to wait for hardware to settle. (cyg_hal_plf_scif_control): Add __COMMCTL_GETBAUD and _SETBAUD support using above function. * include/sh4_scif.h: Add baud_rate to channel data. * include/mod_regs_ser.h (CYGARC_SCBRR_N): Don't tweak BRR for values < 4800 or > 115200 as it gets the values wrong. Instead trust the developer to DTRT. (CYGARC_REG_SCIF_SCLSR_ORER): Add definition for overrun in line status reg. 2003-09-19 John Dallaway <jld@ecoscentric.com> * cdl/hal_sh_sh4.cdl: Specify default CDL values for sh4_202_md target. 2003-09-11 Nick Garnett <nickg@ecoscentric.com> * include/var_regs.h (CYG_FPSCR): Changed initial value of fpscr to do round-to-nearest rather than round-to-zero. 2003-09-08 Nick Garnett <nickg@ecoscentric.com> * include/mod_202.h: Added define for UBC. The 202 appears to have one, although there is no documented info. It is also not clear what version it is. Setting this to 1 seems to work. * include/mod_regs_cac.h: * include/variant.inc: Updated cache dimensions and initialization to support larger, two way cache in sh4-202. 2003-09-05 Nick Garnett <nickg@ecoscentric.com> * include/variant.inc: * include/var_reg.h: * include/mod_202.h: * include/mod_regs_cpg.h: * include/mod_regs_emi.h: * include/mod_regs_femi.h: * include/mod_regs_intc.h: * cdl/hal_sh_sh4.cdl: Added SH-202 sub-variant, extra functional units, and modifications to existing units for this variant.

author	nickg
date	Fri, 05 Dec 2003 17:07:29 +0000
parents	d2c90368aeef
children	bc88a3357a79

rev	line source
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	1 # ====================================================================
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	2 #
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	3 # hal_sh_sh4.cdl
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	4 #
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	5 # SH4 architectural HAL package configuration data
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	6 #
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	7 # ====================================================================
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	8 #####ECOSGPLCOPYRIGHTBEGIN####
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	9 ## -------------------------------------------
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	10 ## This file is part of eCos, the Embedded Configurable Operating System.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
1424 5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	12 ## Copyright (C) 2003 Nick Garnett
210 d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	13 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	14 ## eCos is free software; you can redistribute it and/or modify it under
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	15 ## the terms of the GNU General Public License as published by the Free
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	16 ## Software Foundation; either version 2 or (at your option) any later version.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	17 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	18 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	19 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	20 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	21 ## for more details.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	22 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	23 ## You should have received a copy of the GNU General Public License along
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	24 ## with eCos; if not, write to the Free Software Foundation, Inc.,
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	25 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	26 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	27 ## As a special exception, if other files instantiate templates or use macros
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	28 ## or inline functions from this file, or you compile this file and link it
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	29 ## with other works to produce a work based on this file, this file does not
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	30 ## by itself cause the resulting work to be covered by the GNU General Public
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	31 ## License. However the source code for this file must still be made available
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	32 ## in accordance with section (3) of the GNU General Public License.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	33 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	34 ## This exception does not invalidate any other reasons why a work based on
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	35 ## this file might be covered by the GNU General Public License.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	36 ##
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	37 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	38 ## at http://sources.redhat.com/ecos/ecos-license/
d2c90368aeef Merge from eCos master repository on 2002-05-23-21:39:14-BST jlarmour parents: 208 diff changeset	39 ## -------------------------------------------
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	40 #####ECOSGPLCOPYRIGHTEND####
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	41 # ====================================================================
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	42 ######DESCRIPTIONBEGIN####
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	43 #
1424 5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	44 # Author(s): jskov, nickg
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	45 # Original data: jskov
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	46 # Contributors:
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	47 # Date: 1999-10-29
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	48 #
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	49 #####DESCRIPTIONEND####
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	50 #
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	51 # ====================================================================
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	52
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	53 cdl_package CYGPKG_HAL_SH_SH4 {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	54 display "SH4 architecture"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	55 parent CYGPKG_HAL_SH
136 a9ac27ec7abc Merge from eCos master repository on 2000-11-17-18:24:25-GMT jlarmour parents: 134 diff changeset	56
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	57 hardware
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	58 include_dir cyg/hal
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	59 define_header hal_sh_sh4.h
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	60 description "
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	61 The SH4 (SuperH 4) architecture HAL package provides generic
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	62 support for this processor architecture. It is also
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	63 necessary to select a specific target platform HAL
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	64 package."
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	65
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	66 compile sh4_scif.c var_misc.c variant.S
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	67
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	68 define_proc {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	69 puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H <pkgconf/hal_sh_sh4.h>"
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	70 puts $::cdl_header "#define CYGBLD_HAL_VAR_EXCEPTION_MODEL_H <cyg/hal/hal_var_bank.h>"
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	71 puts $::cdl_header "#define CYGBLD_HAL_VAR_EXCEPTION_MODEL_INC <cyg/hal/hal_var_bank.inc>"
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	72 puts $::cdl_header "#define CYGBLD_HAL_VAR_INTR_MODEL_H <cyg/hal/hal_intr_excevt.h>"
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	73 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	74
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	75 # The "-o file" is a workaround for CR100958 - without it the
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	76 # output file would end up in the source directory under CygWin.
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	77 # n.b. grep does not behave itself under win32
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	78 make -priority 1 {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	79 <PREFIX>/include/cyg/hal/sh4_offsets.inc : <PACKAGE>/src/var_mk_defs.c
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	80 $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,sh4_offsets.tmp -o var_mk_defs.tmp -S $<
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	81 fgrep .equ var_mk_defs.tmp \| sed s/#// > $@
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	82 @echo $@ ": \\" > $(notdir $@).deps
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	83 @tail +2 sh4_offsets.tmp >> $(notdir $@).deps
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	84 @echo >> $(notdir $@).deps
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	85 @rm sh4_offsets.tmp var_mk_defs.tmp
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	86 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	87
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	88 # CPU variant supported
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	89 cdl_component CYGPKG_HAL_SH_7750 {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	90 display "SH 7750 microprocessor"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	91 parent CYGPKG_HAL_SH_CPU
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	92 implements CYGINT_HAL_SH_VARIANT
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	93 implements CYGINT_HAL_SH_CPG_T1
184 022f1e506033 Merge from eCos master repository on 2001-10-02-17:59:22-BST jlarmour parents: 171 diff changeset	94 requires ! CYGHWR_HAL_SH_CACHE_ENABLE
1424 5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	95 default_value 0
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	96 no_define
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	97 define -file=system.h CYGPKG_HAL_SH_7750
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	98 description "
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	99 The SH4 7750 microprocessor. This is an embedded part that in
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	100 addition to the SH4 processor core has built in peripherals
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	101 such as memory controllers, DMA controllers, serial ports and
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	102 timers/counters."
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	103 define_proc {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	104 puts $cdl_system_header "#define CYGBLD_HAL_CPU_MODULES_H <cyg/hal/mod_7750.h>"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	105 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	106 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	107
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	108 cdl_component CYGPKG_HAL_SH_7751 {
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	109 display "SH 7751 microprocessor"
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	110 parent CYGPKG_HAL_SH_CPU
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	111 implements CYGINT_HAL_SH_VARIANT
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	112 implements CYGINT_HAL_SH_CPG_T1
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	113 default_value 0
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	114 no_define
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	115 define -file=system.h CYGPKG_HAL_SH_7751
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	116 compile pcic.c
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	117 description "
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	118 The SH4 7751 microprocessor. This is an embedded part that in
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	119 addition to the SH4 processor core has built in peripherals
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	120 such as memory controllers, DMA controllers, serial ports and
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	121 timers/counters."
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	122 define_proc {
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	123 puts $cdl_system_header "#define CYGBLD_HAL_CPU_MODULES_H <cyg/hal/mod_7751.h>"
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	124 }
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	125 }
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	126
1424 5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	127 cdl_component CYGPKG_HAL_SH_202 {
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	128 display "SH 202 microprocessor"
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	129 parent CYGPKG_HAL_SH_CPU
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	130 implements CYGINT_HAL_SH_VARIANT
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	131 implements CYGINT_HAL_SH_CPG_T1
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	132 requires CYGHWR_HAL_SH_FPU
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	133 requires { CYGHWR_HAL_SH_FPU_REGS == 16 }
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	134 default_value 0
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	135 no_define
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	136 define -file=system.h CYGPKG_HAL_SH_202
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	137 description "
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	138 The SH4-202 microprocessor. This is an embedded part that in
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	139 addition to the SH4 processor core has built in peripherals
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	140 such as memory controllers, DMA controllers, serial ports and
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	141 timers/counters."
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	142 define_proc {
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	143 puts $cdl_system_header "#define CYGBLD_HAL_CPU_MODULES_H <cyg/hal/mod_202.h>"
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	144 }
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	145 }
5268028c09c4 2003-09-21 Jonathan Larmour <jifl@eCosCentric.com> nickg parents: 210 diff changeset	146
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	147 cdl_component CYGHWR_HAL_SH_CLOCK_SETTINGS {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	148 display "SH on-chip generic clock controls"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	149 description "
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	150 The various clocks used by the system are controlled by
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	151 these options, some of which are derived from platform
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	152 settings."
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	153 flavor none
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	154 no_define
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	155
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	156 cdl_interface CYGINT_HAL_SH_CPG_T1 {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	157 display "Clock pulse generator type 1"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	158 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	159
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	160 cdl_option CYGHWR_HAL_SH_TMU_PRESCALE_0 {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	161 display "TMU counter 0 prescaling"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	162 description "
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	163 The peripheral clock is driving the counter used for
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	164 the real-time clock, prescaled by this factor."
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	165 flavor data
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	166 legal_values { 4 16 64 256 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	167 default_value 4
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	168 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	169
208 e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	170 cdl_option CYGHWR_HAL_SH_RTC_PRESCALE {
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	171 display "eCos RTC prescaling"
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	172 flavor data
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	173 calculated CYGHWR_HAL_SH_TMU_PRESCALE_0
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	174 }
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST jlarmour parents: 184 diff changeset	175
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	176 cdl_option CYGHWR_HAL_SH_CLOCK_CKIO {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	177 display "CKIO clock"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	178 no_define
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	179 flavor data
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	180 calculated { CYGHWR_HAL_SH_PLL2_OUTPUT }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	181 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	182
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	183 cdl_option CYGHWR_HAL_SH_PLL1_OUTPUT {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	184 display "The clock output from PLL1"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	185 no_define
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	186 flavor data
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	187 calculated { CYGHWR_HAL_SH_DIVIDER1_OUTPUT * CYGHWR_HAL_SH_OOC_PLL_1 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	188 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	189
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	190 cdl_option CYGHWR_HAL_SH_DIVIDER1_OUTPUT {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	191 display "The clock output from divider 1"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	192 no_define
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	193 flavor data
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	194 # DIV1 output is either 1 or 1/2 XTAL
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	195 calculated { (CYGHWR_HAL_SH_OOC_DIVIDER_1 == 1)
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	196 ? CYGHWR_HAL_SH_OOC_XTAL
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	197 : CYGHWR_HAL_SH_OOC_XTAL / 2 }
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	198 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	199
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	200 cdl_option CYGHWR_HAL_SH_PROCESSOR_SPEED {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	201 display "Processor clock speed (MHz)"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	202 flavor data
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	203 calculated { CYGHWR_HAL_SH_PLL1_OUTPUT / CYGHWR_HAL_SH_OOC_DIVIDER_IFC }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	204 description "
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	205 The peripheral speed is computed from the PLL2 output clock
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	206 speed and the IFC divider settings."
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	207 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	208
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	209 cdl_option CYGHWR_HAL_SH_BOARD_SPEED {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	210 display "Platform bus clock speed (MHz)"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	211 flavor data
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	212 calculated { CYGHWR_HAL_SH_PLL1_OUTPUT / CYGHWR_HAL_SH_OOC_DIVIDER_BFC }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	213 description "
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	214 The peripheral speed is computed from the PLL2 output clock
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	215 speed and the BFC divider settings."
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	216 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	217
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	218 cdl_option CYGHWR_HAL_SH_ONCHIP_PERIPHERAL_SPEED {
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	219 display "Processor on-chip peripheral clock speed (MHz)"
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	220 flavor data
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	221 calculated { CYGHWR_HAL_SH_PLL1_OUTPUT / CYGHWR_HAL_SH_OOC_DIVIDER_PFC }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	222 description "
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	223 The peripheral speed is computed from the PLL2 output clock
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	224 speed and the PFC divider settings."
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	225 }
d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	226 }
151 25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	227
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	228 cdl_option CYGNUM_HAL_SH_SH4_SCIF_BAUD_RATE {
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	229 display "SCIF serial ports default baud rate"
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	230 flavor data
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	231 legal_values { 4800 9600 14400 19200 38400 57600 115200 }
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	232 default_value { CYGNUM_HAL_SH_SH4_SCIF_BAUD_RATE_DEFAULT ? \
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	233 CYGNUM_HAL_SH_SH4_SCIF_BAUD_RATE_DEFAULT : 38400 }
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	234 description "
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	235 This controls the default baud rate used for communicating
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	236 with GDB / displaying diagnostic output."
25e238959bae Merge from eCos master repository on 2001-02-12-23:44:24-GMT jlarmour parents: 136 diff changeset	237 }
171 42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	238
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	239 cdl_component CYGPKG_HAL_SH_INTERRUPT {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	240 display "Interrupt controls"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	241 flavor none
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	242 no_define
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	243 description "
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	244 Initial interrupt settings can be specified using these option."
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	245
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	246 cdl_option CYGHWR_HAL_SH_IRQ_USE_IRQLVL {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	247 display "Use IRL0-3 pins as IRL input"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	248 default_value 0
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	249 description "
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	250 It is possible for the IRL0-3 pins to be used as IRL
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	251 inputs by enabling this option."
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	252 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	253 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	254
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	255 # Cache settings
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	256 cdl_option CYGHWR_HAL_SH_CACHE_MODE_P0 {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	257 display "Select cache mode set for P0/U0/P3 at startup"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	258 parent CYGPKG_HAL_SH_CACHE
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	259 default_value { "WRITE_BACK" }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	260 legal_values { "WRITE_BACK" "WRITE_THROUGH" }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	261 flavor data
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	262 description "
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	263 Controls what cache mode the cache should be put in at
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	264 startup for areas P0, U0 and P3. Write-back mode improves
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	265 performance by letting dirty data to be kept in the
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	266 cache for a period of time, allowing mutiple writes to
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	267 the same cache line to be written back to memory in
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	268 one memory transaction. In Write-through mode, each
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	269 individual write will cause a memory transaction."
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	270 }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	271
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	272 cdl_option CYGHWR_HAL_SH_CACHE_MODE_P1 {
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	273 display "Select cache mode set for P1 at startup"
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	274 parent CYGPKG_HAL_SH_CACHE
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	275 default_value { "WRITE_BACK" }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	276 legal_values { "WRITE_BACK" "WRITE_THROUGH" }
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	277 flavor data
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	278 description "
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	279 Controls what cache mode the cache should be put in at
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	280 startup for area P1. Write-back mode improves
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	281 performance by letting dirty data to be kept in the
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	282 cache for a period of time, allowing mutiple writes to
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	283 the same cache line to be written back to memory in
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	284 one memory transaction. In Write-through mode, each
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	285 individual write will cause a memory transaction."
42f843b391aa Merge from eCos master repository on 2001-07-18-03:13:25-BST jlarmour parents: 151 diff changeset	286 }
134 d2f49caf9e38 Merge from eCos master repository on 2000-11-03-09:00:49-GMT jlarmour parents: diff changeset	287 }

Mercurial > flash_v2

annotate packages/hal/sh/sh4/current/cdl/hal_sh_sh4.cdl @ 1424:5268028c09c4