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annotate packages/hal/powerpc/arch/current/src/hal_misc.c @ 72:da3908c9cd10 ecos-sw-2000-02-17

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Merge from eCos master repository on 2000-02-17-18:56:14-GMT
author jlarmour
date Thu, 17 Feb 2000 19:38:13 +0000
parents c5536bad4c24
children 6736c52df507
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1 //==========================================================================
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2 //
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3 // hal_misc.c
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4 //
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5 // HAL miscellaneous functions
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6 //
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7 //==========================================================================
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8 //####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 //####COPYRIGHTEND####
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31 //==========================================================================
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32 //#####DESCRIPTIONBEGIN####
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33 //
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34 // Author(s): nickg, jskov
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35 // Contributors: nickg, jskov,
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36 // jlarmour
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37 // Date: 1999-02-20
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38 // Purpose: HAL miscellaneous functions
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39 // Description: This file contains miscellaneous functions provided by the
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40 // HAL.
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41 //
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42 //####DESCRIPTIONEND####
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43 //
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44 //===========================================================================
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45
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46 #include <pkgconf/hal.h>
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47
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48 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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49 #include <cyg/hal/ppc_regs.h> // SPR definitions
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50
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51 #include <cyg/infra/cyg_type.h>
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52 #include <cyg/infra/cyg_trac.h> // tracing macros
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53 #include <cyg/infra/cyg_ass.h> // assertion macros
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54 #include <cyg/infra/diag.h> // diag_printf
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56 #include <cyg/hal/hal_arch.h> // HAL header
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57 #include <cyg/hal/hal_cache.h> // HAL cache
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58 #if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
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59 defined(CYGPKG_HAL_EXCEPTIONS)
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60 # include <cyg/hal/hal_intr.h> // HAL interrupts/exceptions
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61 #endif
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62 #include <cyg/hal/hal_mem.h> // HAL memory handling
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64 //---------------------------------------------------------------------------
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65 // Functions used during initialization.
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66
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67 #ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
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68 cyg_bool cyg_hal_stop_constructors;
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69 #endif
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70
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71 typedef void (*pfunc) (void);
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72 extern pfunc __CTOR_LIST__[];
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73 extern pfunc __CTOR_END__[];
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74
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75 void
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76 cyg_hal_invoke_constructors (void)
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77 {
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78 #ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
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79 static pfunc *p = &__CTOR_END__[-1];
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80
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81 cyg_hal_stop_constructors = 0;
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82 for (; p >= __CTOR_LIST__; p--) {
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83 (*p) ();
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84 if (cyg_hal_stop_constructors) {
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85 p--;
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86 break;
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87 }
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88 }
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89 #else
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90 pfunc *p;
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91
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92 for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
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93 (*p) ();
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94 #endif
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95 }
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96
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97 // Override any __eabi the compiler might generate. We don't want
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98 // constructors to be called twice.
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99 void __eabi (void) {}
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100
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101 //---------------------------------------------------------------------------
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102 // First level C exception handler.
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103
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104 externC void __handle_exception (void);
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105
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106 externC HAL_SavedRegisters *_hal_registers;
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107
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108 externC void *__mem_fault_handler;
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109
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110 void
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111 cyg_hal_exception_handler(HAL_SavedRegisters *regs)
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112 {
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113 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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114
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115 // If we caught an exception inside the stubs, see if we were expecting it
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116 // and if so jump to the saved address
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117 if (__mem_fault_handler) {
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118 regs->pc = (CYG_ADDRWORD)__mem_fault_handler;
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119 return; // Caught an exception inside stubs
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120 }
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121
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122 // Set the pointer to the registers of the current exception
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123 // context. At entry the GDB stub will expand the
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124 // HAL_SavedRegisters structure into a (bigger) register array.
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125 _hal_registers = regs;
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126
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127 __handle_exception();
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128
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129 #ifdef CYGPKG_HAL_QUICC
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130 {
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131 // This is unpleasant: it appears that if we interrupt the board
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132 // using ^C coming in on the QUICC's SMC1, by planting a breakpoint
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133 // at the interrupt return address, the decrementer interrupt is
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134 // not taken when the bp exception returns AND WORSE no other
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135 // interrupt is possible until the decrementer fires again. This
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136 // does not apply to simple "incoming character" interrupts; it
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137 // seems it has to be combined with an immediate trap on RTI for
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138 // this to occur.
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139 //
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140 // The solution is to test for decrementer underflow after the
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141 // (any) exception, and maybe reinitialize the decrementer. If the
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142 // decrementer interrupt gets taken, that causes decrementer reinit
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143 // too, and no harm is done.
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144
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145 cyg_uint32 result;
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146 asm volatile(
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147 "mfdec %0;"
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148 : "=r"(result)
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149 );
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150
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151 if ( CYGNUM_HAL_RTC_PERIOD < result ) {
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152 // then we missed a tick, but the exception masked it
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153 // reset the decrementer here
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154 asm volatile(
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155 "mtdec %0;"
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156 : : "r"(CYGNUM_HAL_RTC_PERIOD)
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157 );
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158 }
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159 }
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160 #endif
18
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161
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162 #elif defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
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163 defined(CYGPKG_HAL_EXCEPTIONS)
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164 int vector = regs->vector>>8;
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165
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166 // We should decode the vector and pass a more appropriate
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167 // value as the second argument. For now we simply pass a
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168 // pointer to the saved registers. We should also divert
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169 // breakpoint and other debug vectors into the debug stubs.
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170
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171 if (vector==CYGNUM_HAL_VECTOR_PROGRAM) {
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172 int srr1;
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173 CYGARC_MFSPR(CYGARC_REG_SRR1, srr1); // get srr1
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174
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175 switch ((srr1 >> 17) & 0xf) {
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176 case 1:
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177 vector = CYGNUM_HAL_EXCEPTION_TRAP;
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178 break;
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179 case 2:
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180 vector = CYGNUM_HAL_EXCEPTION_PRIVILEGED_INSTRUCTION;
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181 break;
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182 case 4:
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183 vector = CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION;
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184 break;
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185 case 8:
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186 vector = CYGNUM_HAL_EXCEPTION_FPU;
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187 break;
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188 default:
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189 CYG_FAIL("Unknown PROGRAM exception!!");
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190 }
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191 }
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192 cyg_hal_deliver_exception( vector, (CYG_ADDRWORD)regs );
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193
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194 #else
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195
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196 CYG_FAIL("Exception!!!");
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197
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198 #endif
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199
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200 return;
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201 }
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202
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203 //---------------------------------------------------------------------------
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204 // Default ISRs
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205
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206 externC cyg_uint32
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207 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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208 {
2
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209 diag_printf("Interrupt: %d\n", vector);
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210
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211 CYG_FAIL("Spurious Interrupt!!!");
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212 return 0;
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213 }
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214
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215 // The decrementer default ISR has to do nothing. The reason is that
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216 // decrementer interrupts cannot be disabled - if a kernel configuration
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217 // does not use the RTC, but does use external interrupts, the decrementer
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218 // underflow could cause a CYG_FAIL (as above) even though the user did
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219 // not expect any decrementer interrupts to happen.
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220 externC cyg_uint32
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221 hal_default_decrementer_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
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222 {
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223 return 0;
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224 }
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225
0
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226 //---------------------------------------------------------------------------
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227 // Idle thread action
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228
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229 void
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230 hal_idle_thread_action( cyg_uint32 count )
0
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231 {
32
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232 #if 0
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233 #ifdef CYGPKG_HAL_POWERPC_MPC860
32
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234 register cyg_uint32 result;
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235
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236 cyg_uint32 *psivec = (cyg_uint32*)CYGARC_REG_IMM_SIVEC ;
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237 cyg_uint32 *psimask = (cyg_uint32*)CYGARC_REG_IMM_SIMASK;
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238 cyg_uint32 *psipend = (cyg_uint32*)CYGARC_REG_IMM_SIPEND;
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239 cyg_uint16 *ptbscr = (cyg_uint16*)CYGARC_REG_IMM_TBSCR;
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240
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241 asm volatile(
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242 "mfdec %0;"
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243 : "=r"(result)
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244 );
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245 diag_printf( "Dec %08x, TBSCR %04x, vec %d: sivec %08x, simask %08x, sipend %08x\n",
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246 result, (cyg_uint32)(*ptbscr), (*psivec)>>26, *psivec, *psimask, *psipend );
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247 #endif
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248 #endif
0
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249 }
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250
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251 //---------------------------------------------------------------------------
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252 // Use MMU resources to map memory regions.
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253 // This relies that the platform HAL providing an
16
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254 // externC cyg_memdesc_t cyg_hal_mem_map[];
72
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255 // as detailed in hal_cache.h, and the variant HAL providing the
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256 // MMU mapping/clear functions.
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257 externC void
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258 hal_MMU_init (void)
2
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259 {
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260 int id = 0;
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261 int i = 0;
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262
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263 cyg_hal_clear_MMU ();
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264
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265 while (cyg_hal_mem_map[i].size) {
72
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266 id = cyg_hal_map_memory (id,
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267 cyg_hal_mem_map[i].virtual_addr,
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268 cyg_hal_mem_map[i].physical_addr,
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269 cyg_hal_mem_map[i].size,
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270 cyg_hal_mem_map[i].flags);
2
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271 i++;
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272 }
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273 }
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274
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275 //---------------------------------------------------------------------------
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276 // Initial cache enabling
64
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277 // Specific behavior for each platform configured via plf_cache.h
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278
2
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279 externC void
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280 hal_enable_caches(void)
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281 {
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282 #ifdef CYGPRI_INIT_CACHES
2
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283 // Initialize caches.
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284 HAL_ICACHE_UNLOCK_ALL();
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285 HAL_DCACHE_UNLOCK_ALL();
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286 HAL_ICACHE_INVALIDATE_ALL();
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287 HAL_DCACHE_INVALIDATE_ALL();
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288
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289 // Enable caches.
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290 #ifdef CYGPRI_ENABLE_CACHES
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291 HAL_ICACHE_ENABLE();
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292 HAL_DCACHE_ENABLE();
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293 #endif
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294 #endif
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295
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296 #ifdef CYGPKG_HAL_POWERPC_MPC8xx
2
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297 // Disable serialization
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298 {
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299 cyg_uint32 ictrl;
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300 CYGARC_MFSPR (ICTRL, ictrl);
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301 ictrl |= ICTRL_NOSERSHOW;
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302 CYGARC_MTSPR (ICTRL, ictrl);
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303 }
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304 #endif
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305 }
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306
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307 //---------------------------------------------------------------------------
36
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308 //A jump via a null pointer causes the CPU to end up here.
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309 externC void
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310 hal_null_call(void)
36
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311 {
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312
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313 CYG_FAIL("Call via NULL-pointer!");
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314 for(;;);
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315 }
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316
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317 //---------------------------------------------------------------------------
0
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318 // End of hal_misc.c