flash_v2: packages/hal/powerpc/arch/current/src/vectors.S annotate

annotate packages/hal/powerpc/arch/current/src/vectors.S @ 76:435cced73e2f ecos-v1_3_1-release

eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST

author	jlarmour
date	Tue, 28 Mar 2000 14:10:45 +0000
parents	da3908c9cd10
children	6736c52df507

rev	line source
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	1 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	2 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	3 ## vectors.S
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	4 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	5 ## PowerPC exception vectors
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	6 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	7 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	8 #####COPYRIGHTBEGIN####
64 c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	9 #
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	10 # -------------------------------------------
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	11 # The contents of this file are subject to the Red Hat eCos Public License
66 bf00f99aec69 Merge from eCos master repository on 2000-02-02-19:16:44-GMT jlarmour parents: 64 diff changeset	12 # Version 1.1 (the "License"); you may not use this file except in
64 c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	13 # compliance with the License. You may obtain a copy of the License at
66 bf00f99aec69 Merge from eCos master repository on 2000-02-02-19:16:44-GMT jlarmour parents: 64 diff changeset	14 # http://www.redhat.com/
64 c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	15 #
66 bf00f99aec69 Merge from eCos master repository on 2000-02-02-19:16:44-GMT jlarmour parents: 64 diff changeset	16 # Software distributed under the License is distributed on an "AS IS"
64 c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	17 # basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	18 # License for the specific language governing rights and limitations under
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	19 # the License.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	20 #
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	21 # The Original Code is eCos - Embedded Configurable Operating System,
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	22 # released September 30, 1998.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	23 #
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	24 # The Initial Developer of the Original Code is Red Hat.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	25 # Portions created by Red Hat are
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	26 # Copyright (C) 1998, 1999, 2000 Red Hat, Inc.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	27 # All Rights Reserved.
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	28 # -------------------------------------------
c38311975d4f Merge from eCos master repository on 2000-01-28-04:28:11-GMT jlarmour parents: 38 diff changeset	29 #
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	30 #####COPYRIGHTEND####
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	31 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	32 #######DESCRIPTIONBEGIN####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	33 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	34 ## Author(s): nickg, jskov
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	35 ## Contributors: nickg, jskov
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	36 ## Date: 1999-02-20
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	37 ## Purpose: PowerPC exception vectors
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	38 ## Description: This file defines the code placed into the exception
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	39 ## vectors. It also contains the first level default VSRs
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	40 ## that save and restore state for both exceptions and
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	41 ## interrupts.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	42 ##
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	43 ######DESCRIPTIONEND####
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	44 ##
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	45 ##==========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	46
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	47 #===========================================================================
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	48 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	49 # The PowerPC exception handling has changed as of version 1.3.1.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	50 # The primary motivation for rewriting the code was to bring it more
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	51 # in line with the other HALs, in particular to allow a RAM application
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	52 # to cleanly take over only a subset of vectors from a running ROM
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	53 # monitor.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	54 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	55 # GDB stubs (and CygMon, should it be ported to PPC) copies
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	56 # exception vector entry handler code to address 0. These vector entry
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	57 # handlers (defined by the exception_vector macro below) compute
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	58 # a vector index into the hal_vsr_table, fetch the pointer, and
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	59 # jump to the HAL vector service routine (VSR).
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	60 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	61 # The hal_vsr_table is located immediately after the vector
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	62 # handlers (at address 0x3000), allowing RAM applications to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	63 # change VSRs as necessary, while still keeping desired ROM
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	64 # monitor functionality available for debugging.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	65 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	66 # ROM applications can still be configured to leave the vector entry
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	67 # handlers at 0xff000000, but there is at the moment no
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	68 # provision for reclaiming the reserved vector space in RAM to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	69 # application usage.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	70 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	71 # RAM applications can also be configured to provide exception
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	72 # handlers which are copied to address 0 on startup, thus taking
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	73 # full control of the target.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	74 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	75 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	76 # Default configuration is for RAM applications to rely on an
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	77 # existing ROM monitor to provide debugging functionality, and
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	78 # for ROM applications to copy vectors to address 0.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	79 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	80 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	81 # Unfortunately the new exception scheme is not compatible with the
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	82 # old scheme. Stubs and applications must be compiled using the same
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	83 # scheme (i.e., old binaries will not run with new stubs, and new
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	84 # binaries will not run with old stubs).
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	85 #
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	86 #===========================================================================
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	87
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	88 #include <pkgconf/hal.h>
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	89
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	90 #ifdef CYGPKG_KERNEL
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	91 #include <pkgconf/kernel.h> // CYGPKG_KERNEL_INSTRUMENT
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	92 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	93
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	94 #define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	95 #include <cyg/hal/ppc_regs.h>
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	96
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	97 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	98
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	99 .file "vectors.S"
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	100
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	101 .extern hal_interrupt_data
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	102 .extern hal_interrupt_handlers
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	103 .extern hal_interrupt_objects
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	104 .extern hal_vsr_table
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	105
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	106 .extern cyg_hal_invoke_constructors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	107 .extern cyg_instrument
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	108 .extern cyg_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	109 .extern hal_IRQ_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	110 .extern hal_MMU_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	111 .extern hal_enable_caches
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	112 .extern hal_hardware_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	113 .extern initialize_stub
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	114
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	115 .extern __bss_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	116 .extern __bss_end
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	117 .extern __sbss_start
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	118 .extern __sbss_end
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	119
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	120 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	121 # MSR initialization value
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	122 # zero all bits except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	123 # FP = floating point available
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	124 # ME = machine check enabled
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	125 # IP = vectors at 0xFFFxxxxx (ROM startup only)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	126 # IR = instruction address translation
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	127 # DR = data address translation
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	128 # RI = recoverable interrupt
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	129
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	130 #define CYG_MSR_COMMON (MSR_FP \| MSR_ME \| MSR_IR \| MSR_DR \| MSR_RI)
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	131 #if defined(CYG_HAL_STARTUP_ROM)
68 f74b2666b30d Merge from eCos master repository on 2000-02-04-07:47:04-GMT jlarmour parents: 66 diff changeset	132 # ifdef CYGSEM_HAL_POWERPC_COPY_VECTORS
16 4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	133 # define CYG_MSR CYG_MSR_COMMON
4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	134 # else
4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	135 # define CYG_MSR (CYG_MSR_COMMON \| MSR_IP)
4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	136 # endif
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	137 #elif defined(CYG_HAL_STARTUP_RAM)
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	138 # define CYG_MSR CYG_MSR_COMMON
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	139 #endif
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	140
68 f74b2666b30d Merge from eCos master repository on 2000-02-04-07:47:04-GMT jlarmour parents: 66 diff changeset	141 #ifdef CYGPKG_HAL_POWERPC_SIM
14 01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST jlarmour parents: 10 diff changeset	142 # When building for SIM, don~t enable MMU -- it~s not needed since caches
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	143 # are disabled, and there is a runtime simulation overhead.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	144 #undef CYG_MSR
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	145 #define CYG_MSR (CYG_MSR_COMMON & ~(MSR_IR \| MSR_DR))
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	146 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	147
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	148 # Include variant macros after MSR definition.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	149 #include <cyg/hal/arch.inc>
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	150 #include <cyg/hal/ppc_offsets.inc>
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	151
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	152
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	153 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	154 # If the following option is enabled, we only save registers up to R12.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	155 # The PowerPC ABI defines registers 13..31 as callee saved and thus we do
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	156 # not need to save them when calling C functions.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	157
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	158 #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	159 # define MAX_SAVE_REG 12
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	160 #else
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	161 # define MAX_SAVE_REG 31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	162 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	163
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	164
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	165 #if defined(CYG_HAL_STARTUP_ROM) \|\| \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	166 defined(CYGPKG_HAL_POWERPC_SIM) \|\| \
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	167 defined(CYGSEM_HAL_POWERPC_COPY_VECTORS)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	168
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	169 #===========================================================================
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	170 # Start by defining the exceptions vectors that must be placed at
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	171 # locations 0xFFF00000 or 0x00000000. The following code will normally
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	172 # be located at 0xFFF00000 in the ROM. It may optionally be copied out
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	173 # to 0x00000000 if we want to use the RAM vectors. For this reason this code
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	174 # MUST BE POSITION INDEPENDENT.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	175
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	176 .section ".vectors","ax"
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	177
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	178 #---------------------------------------------------------------------------
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	179 # Macros for generating an exception vector service routine
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	180
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	181 # Reset vector macro
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	182
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	183 .macro reset_vector name
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	184 .p2align 8
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	185 .globl __exception_\name
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	186 __exception_\name:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	187 lwi r3,_start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	188 mtlr r3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	189 blr
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	190 .endm
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	191
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	192 # Generic vector macro
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	193
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	194 .macro exception_vector name
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	195 .p2align 8
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	196 .globl __exception_\name
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	197 __exception_\name:
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	198 mtspr SPRG1,r3 # stash some work registers away
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	199 mtspr SPRG2,r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	200 mtspr SPRG3,r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	201 mfcr r4 # stash CR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	202 li r5,__exception_\name@L # load low half of vector addr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	203 srwi r5,r5,6 # shift right by 6
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	204 lwi r3,hal_vsr_table # table base
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	205 lwzx r3,r3,r5 # address of vsr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	206 mflr r5 # save link register
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	207 mtlr r3 # put vsr address into it
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	208 li r3,__exception_\name@L # reload low half of vector addr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	209 blr # go to common code
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	210 .endm
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	211
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	212 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	213 # Define the exception vectors.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	214
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	215 rom_vectors:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	216 # These are the architecture defined vectors that
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	217 # are always present.
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	218 exception_vector reserved_00000
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	219 reset_vector reset
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	220 exception_vector machine_check
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	221 exception_vector data_storage
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	222 exception_vector instruction_storage
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	223 exception_vector external
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	224 exception_vector alignment
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	225 exception_vector program
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	226 exception_vector floatingpoint_unavailable
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	227 exception_vector decrementer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	228 exception_vector reserved_00a00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	229 exception_vector reserved_00b00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	230 exception_vector system_call
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	231 exception_vector trace
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	232 exception_vector floatingpoint_assist
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	233 exception_vector reserved_00f00
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	234
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	235 # Variants may define extra vectors.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	236 hal_extra_vectors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	237
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	238 rom_vectors_end:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	239
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	240 #else // CYG_HAL_STARTUP_ROM \|\| CYGSEM_HAL_POWERPC_COPY_VECTORS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	241
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	242 # When vectors are not included this is the primary entry point.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	243 .globl __exception_reset
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	244 __exception_reset:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	245 lwi r3,_start
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	246 mtlr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	247 blr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	248
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	249 #endif // CYG_HAL_STARTUP_ROM \|\| CYGSEM_HAL_POWERPC_COPY_VECTORS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	250
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	251
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	252
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	253 #===========================================================================
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	254 # Real startup code. We jump here from the various reset vectors to set up
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	255 # the world.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	256
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	257 .text
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	258 .globl _start
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	259 _start:
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	260 # Initialize CPU to a post-reset state, ensuring the ground doesn''t
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	261 # shift under us while we try to set things up.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	262 hal_cpu_init
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	263
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	264 #if !defined(CYG_HAL_STARTUP_ROM) && defined(CYGSEM_HAL_POWERPC_COPY_VECTORS)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	265 lwi r3,rom_vectors-4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	266 lwi r4,0x0000-4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	267 lwi r5,rom_vectors_end-4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	268 0: lwzu r0,4(r3)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	269 stwu r0,4(r4)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	270 cmplw r3,r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	271 bne 0b
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	272 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	273
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	274 # Set up global offset table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	275 lwi r2,_GLOBAL_OFFSET_TABLE_
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	276
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	277 # set up time base register to zero
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	278 xor r3,r3,r3
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	279 mtspr TBL_W,r3
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	280 xor r4,r4,r4
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	281 mtspr TBU_W,r4
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	282
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	283 # Call platform specific hardware initialization
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	284 # This may include memory controller initialization. It is not
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	285 # safe to access RAM until after this point.
16 4f2df4ab82c8 Merge from eCos master repository on 1999-06-18-15:25:04-BST jlarmour parents: 14 diff changeset	286 bl hal_hardware_init # this is platform dependent
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	287
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	288 # set up stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	289 lwi sp,__interrupt_stack
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	290 mtspr SPRG0,sp # save in sprg0 for later use
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	291
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	292 # Set up exception handlers and VSR table, taking care not to
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	293 # step on any ROM monitor''s toes.
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	294 hal_mon_init
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	295
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	296 #if defined(CYG_HAL_STARTUP_ROM)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	297
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	298 # Copy data from ROM to ram
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	299 lwi r3,__rom_data_start # r3 = rom start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	300 lwi r4,__ram_data_start # r4 = ram start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	301 lwi r5,__ram_data_end # r5 = ram end
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	302
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	303 cmplw r4,r5 # skip if no data
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	304 beq 2f
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	305
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	306 1:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	307 lwz r0,0(r3) # get word from ROM
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	308 stw r0,0(r4) # store in RAM
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	309 addi r3,r3,4 # increment by 1 word
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	310 addi r4,r4,4 # increment by 1 word
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	311 cmplw r4,r5 # compare
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	312 blt 1b # loop if not yet done
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	313 2:
14 01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST jlarmour parents: 10 diff changeset	314 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	315
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	316 # clear BSS
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	317 lwi r3,__bss_start # r3 = start
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	318 lwi r4,__bss_end # r4 = end
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	319 li r0,0 # r0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	320 cmplw r3,r4 # skip if no bss
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	321 beq 2f
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	322
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	323 1: stw r0,0(r3) # store zero
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	324 addi r3,r3,4 # increment by 1 word
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	325 cmplw r3,r4 # compare
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	326 blt 1b # loop if not yet done
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	327 2:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	328
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	329 # clear SBSS
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	330 lwi r3,__sbss_start # r3 = start
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	331 lwi r4,__sbss_end # r4 = end
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	332 cmplw r3,r4 # skip if no sbss
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	333 beq 2f
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	334
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	335 1: stw r0,0(r3) # store zero
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	336 addi r3,r3,4 # increment by 1 word
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	337 cmplw r3,r4 # compare
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	338 blt 1b # loop if not yet done
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	339 2:
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	340
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	341 # It is now safe to call C functions which may rely on initialized
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	342 # data.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	343
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	344 # Set up stack for calls to C code.
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	345 subi sp,sp,12 # make space on stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	346 li r0,0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	347 stw r0,0(sp) # clear back chain
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	348 stw r0,8(sp) # zero return pc
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	349 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	350
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	351 # Initialize MMU.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	352 bl hal_MMU_init
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	353
38 e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST jlarmour parents: 36 diff changeset	354 # Enable MMU so we can safely enable caches.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	355 lwi r3,CYG_MSR # interrupts enabled later
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	356 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	357 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	358 sync
14 01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST jlarmour parents: 10 diff changeset	359
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	360 # Enable caches
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	361 bl hal_enable_caches
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	362
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	363 # call c++ constructors
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	364 bl cyg_hal_invoke_constructors
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	365
20 5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST jlarmour parents: 18 diff changeset	366 # set up platform specific interrupt environment
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST jlarmour parents: 18 diff changeset	367 bl hal_IRQ_init
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST jlarmour parents: 18 diff changeset	368
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	369 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	370 bl initialize_stub
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	371 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	372
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	373 bl cyg_start # call cyg_start
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	374 9:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	375 b 9b # if we return, loop
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	376
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	377 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	378 # This code handles the common part of all exception handlers.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	379 # It saves the machine state onto the stack and then calls
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	380 # a "C" routine to do the rest of the work. This work may result
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	381 # in thread switches, and changes to the saved state. When we return
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	382 # here the saved state is restored and execution is continued.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	383
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	384 .text
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	385
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	386 .globl cyg_hal_default_exception_vsr
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	387 cyg_hal_default_exception_vsr:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	388
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	389 # We come here with all register containing their
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	390 # pre-exception values except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	391 # R3 = ls 16 bits of vector address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	392 # R4 = saved CR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	393 # R5 = saved LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	394 # LR = VSR address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	395 # SPRG1 = old R3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	396 # SPRG2 = old R4
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	397 # SPRG3 = old R5
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	398 # SRR0 = old PC
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	399 # SRR1 = old MSR and the exception cause (the POW state is lost!)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	400
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	401 subi sp,sp,CYGARC_PPC_EXCEPTION_DECREMENT
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	402 # leave space for registers and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	403 # a safety margin
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	404
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	405 # First, save away some registers
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	406 stw r3,CYGARC_PPCREG_VECTOR(sp) # stash vector
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	407 stw r4,CYGARC_PPCREG_CR(sp) # stash CR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	408 stw r5,CYGARC_PPCREG_LR(sp) # stash LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	409
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	410 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	411 # Mark this fram as an Exception frame
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	412 lwi r3,0xDDDDDDE0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	413 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	414 lwi r3,0xDDDDDDE1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	415 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	416 #endif
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	417
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	418 # Enable MMU.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	419 lwi r3,CYG_MSR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	420 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	421 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	422 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	423
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	424 mfspr r3,SPRG1 # save original R3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	425 stw r3,CYGARC_PPCREG_REGS+3*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	426 mfspr r4,SPRG2 # save original R4
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	427 stw r4,CYGARC_PPCREG_REGS+4*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	428 mfspr r5,SPRG3 # save original R5
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	429 stw r5,CYGARC_PPCREG_REGS+5*4(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	430
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	431 stw r0,CYGARC_PPCREG_REGS+0*4(sp) # save R0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	432 stw r2,CYGARC_PPCREG_REGS+2*4(sp) # save R2
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	433
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	434 mr r3,sp # recreate original SP
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	435 addi r3,r3,CYGARC_PPC_EXCEPTION_DECREMENT
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	436 stw r3,CYGARC_PPCREG_REGS+1*4(sp) # and save it in state
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	437
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	438 # Save registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	439 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	440 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	441 stw _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	442 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	443 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	444
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	445 # Save registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	446 stw r14,(CYGARC_PPCREG_REGS+14*4)(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	447 stw r15,(CYGARC_PPCREG_REGS+15*4)(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	448
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	449 # get remaining family CPU registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	450 mfxer r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	451 mfctr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	452 mfsrr0 r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	453 mfsrr1 r6
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	454 # and store them
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	455 stw r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	456 stw r4,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	457 stw r5,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	458 stw r6,CYGARC_PPCREG_MSR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	459
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	460 # Save variant registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	461 hal_variant_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	462
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	463 # Save FPU registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	464 hal_fpu_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	465
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	466 # The entire CPU state is now stashed on the stack,
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	467 # call into C to do something with it.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	468
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	469 mr r3,sp # R3 = register dump
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	470
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	471 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	472
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	473 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	474 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	475 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	476
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	477 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	478 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	479
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	480 lwi r5,restore_state # get return link
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	481 mtlr r5 # to link register
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	482
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	483 .extern cyg_hal_exception_handler
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	484 b cyg_hal_exception_handler # call C code, r3 = registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	485
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	486 # When the call returns it will go to restore_state below.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	487
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	488
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	489 ##--------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	490 ## The following macros are defined depending on whether the Interrupt
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	491 ## system is using isr tables or chaining, and depending on the interrupt
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	492 ## controller in the system.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	493
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	494 #ifndef CYGPKG_HAL_POWERPC_INTC_DEFINED
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	495
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	496 ## This is the simple version. No interrupt controller, CYGARC_PPCREG_VECTOR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	497 ## is updated with the decoded interrupt vector. Isr tables/chaining
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	498 ## use same interrupt decoder.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	499 ## Bit 21 biffers between decrementer (0) and external (1).
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	500
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	501 # decode the interrupt
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	502 .macro hal_intc_decode dreg,state
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	503 lwz \dreg,CYGARC_PPCREG_VECTOR(\state) # retrieve vector number,
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	504 rlwinm \dreg,\dreg,22,31,31 # isolate bit 21 and update
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	505 stw \dreg,CYGARC_PPCREG_VECTOR(\state) # vector in state frame.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	506 slwi \dreg,\dreg,2 # convert to word offset.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	507 .endm
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	508
72 da3908c9cd10 Merge from eCos master repository on 2000-02-17-18:56:14-GMT jlarmour parents: 70 diff changeset	509 #endif // CYGPKG_HAL_POWERPC_INTC_DEFINED
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	510
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	511 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	512 # Common interrupt handling code.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	513
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	514 .globl cyg_hal_default_interrupt_vsr
c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	515 cyg_hal_default_interrupt_vsr:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	516
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	517 # We come here with all register containing their
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	518 # pre-exception values except:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	519 # R3 = ls 16 bits of vector address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	520 # R4 = saved CR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	521 # R5 = saved LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	522 # LR = VSR address
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	523 # SPRG1 = old R3
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	524 # SPRG2 = old R4
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	525 # SPRG3 = old R5
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	526 # SRR0 = old PC
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	527 # SRR1 = old MSR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	528
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	529
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	530 subi sp,sp,CYGARC_PPC_EXCEPTION_DECREMENT
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	531 # leave space for registers and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	532 # a safety margin
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	533
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	534 stw r3,CYGARC_PPCREG_VECTOR(sp) # stash vector
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	535 stw r4,CYGARC_PPCREG_CR(sp) # stash CR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	536 stw r5,CYGARC_PPCREG_LR(sp) # stash LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	537
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	538 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	539 # Mark this fram as an 1nterrupt frame
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	540 lwi r3,0xDDDDDD10
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	541 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	542 lwi r3,0xDDDDDD11
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	543 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	544 #endif
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	545
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	546 # Enable MMU.
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	547 lwi r3,CYG_MSR
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	548 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	549 mtmsr r3
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	550 sync
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	551
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	552 mfspr r3,SPRG1 # save original R3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	553 stw r3,CYGARC_PPCREG_REGS+3*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	554 mfspr r4,SPRG2 # save original R4
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	555 stw r4,CYGARC_PPCREG_REGS+4*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	556 mfspr r5,SPRG3 # save original R5
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	557 stw r5,CYGARC_PPCREG_REGS+5*4(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	558
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	559 stw r0,CYGARC_PPCREG_REGS+0*4(sp) # save R0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	560 stw r2,CYGARC_PPCREG_REGS+2*4(sp) # save R2
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	561
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	562 mr r3,sp # recreate original SP
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	563 addi r3,r3,CYGARC_PPC_EXCEPTION_DECREMENT
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	564 stw r3,CYGARC_PPCREG_REGS+1*4(sp) # and save it in state
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	565
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	566 # Save registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	567 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	568 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	569 stw _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	570 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	571 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	572
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	573 # Save registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	574 stw r14,CYGARC_PPCREG_REGS+14*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	575 stw r15,CYGARC_PPCREG_REGS+15*4(sp)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	576
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	577 # get remaining family CPU registers
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	578 mfxer r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	579 mfctr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	580 mfsrr0 r5
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	581 mfsrr1 r6
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	582
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	583 # and store them
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	584 stw r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	585 stw r4,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	586 stw r5,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	587 stw r6,CYGARC_PPCREG_MSR(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	588
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	589 # Save variant registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	590 hal_variant_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	591
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	592 # Save FPU registers
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	593 hal_fpu_save sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	594
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	595 # The entire CPU state is now stashed on the stack,
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	596 # increment the scheduler lock and call the ISR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	597 # for this vector.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	598
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	599 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	600 .extern cyg_scheduler_sched_lock
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	601 lwi r3,cyg_scheduler_sched_lock
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	602 lwz r4,0(r3)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	603 addi r4,r4,1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	604 stw r4,0(r3)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	605 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	606
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	607 mr r14,sp # r14 = register dump
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	608
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	609 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	610 lwi r3,__interrupt_stack # stack top
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	611 lwi r4,__interrupt_stack_base # stack base
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	612 sub. r5,sp,r4 # sp - base
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	613 blt 1f # if < 0 - not on istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	614 sub. r5,r3,sp # top - sp
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	615 bgt 2f # if > 0 - already on istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	616
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	617 1: mr sp,r3 # switch to istack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	618
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	619 2: stwu r14,-4(sp) # save old SP on stack
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	620
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	621 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	622
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	623 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	624
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	625 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	626 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	627 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	628
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	629 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	630 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	631
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	632 #if defined(CYGPKG_KERNEL_INSTRUMENT) && defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	633
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	634 lwi r3,0x0301 # r3 = type = INTR,RAISE
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	635 lwz r4,CYGARC_PPCREG_VECTOR(r14) # arg1 = vector address
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	636 srwi r4,r4,8 # arg1 = vector number
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	637 xor r5,r5,r5 # arg2 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	638 bl cyg_instrument # call instrument function
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	639
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	640 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	641
70 c5536bad4c24 Merge from eCos master repository on 2000-02-11-15:46:40-GMT jlarmour parents: 68 diff changeset	642 hal_intc_decode r15,r14 # get table index
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	643
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	644 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	645 .extern cyg_hal_gdb_isr
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	646 lwz r3,CYGARC_PPCREG_PC(r14) # for serial receive irq.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	647 bl cyg_hal_gdb_isr # (arg1 is PC)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	648 cmpwi r3,0x0000 # Call ISR proper?
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	649 beq 2f # (r3 is 0 when skipping
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	650 # to avoid DSR call)
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	651 1:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	652 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	653
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	654 #ifdef CYGSEM_HAL_COMMON_INTERRUPTS_ALLOW_NESTING
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	655
68 f74b2666b30d Merge from eCos master repository on 2000-02-04-07:47:04-GMT jlarmour parents: 66 diff changeset	656 #ifdef CYGPKG_HAL_POWERPC_MPC8xx
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	657 # The CPM controller allows nested interrupts. However,
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	658 # it sits on the back of the SIU controller which has no
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	659 # HW support for this. In effect, SW masking of lower
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	660 # priority IRQs in the SIU would be required for this to work.
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	661 #endif
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	662
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	663 #endif
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	664
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	665 lwz r3,CYGARC_PPCREG_VECTOR(r14) # retrieve decoded vector #
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	666
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	667 lwi r6,hal_interrupt_handlers # get interrupt handler table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	668 lwzx r6,r6,r15 # load routine pointer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	669
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	670 lwi r4,hal_interrupt_data # get interrupt data table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	671 lwzx r4,r4,r15 # load data pointer
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	672 # R4 = data argument
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	673
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	674 mtctr r6 # put isr address in ctr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	675
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	676 bctrl # branch to ctr reg and link
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	677
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	678 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	679 # If interrupt was caused by GDB, the ISR call above
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	680 # is skipped by jumping here.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	681 2:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	682 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	683
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	684 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	685
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	686 # If we are returning from the last nested interrupt, move back
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	687 # to the thread stack. interrupt_end() must be called on the
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	688 # thread stack since it potentially causes a context switch.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	689 # Since we have arranged for the top of stack location to
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	690 # contain the sp we need to go back to here, just pop it off
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	691 # and put it in SP.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	692
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	693
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	694 lwz sp,CYGARC_PPC_STACK_FRAME_SIZE2(sp) # sp = sp
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	695
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	696 subi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE # make a null frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	697
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	698 li r0,0 # R0 = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	699 stw r0,0(sp) # backchain = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	700 stw r0,8(sp) # return pc = 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	701
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	702 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp) # create new stack frame
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	703 # where C code can save LR
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	704 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	705
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	706 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	707
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	708 # We only need to call _interrupt_end() when there is a kernel
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	709 # present to do any tidying up.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	710
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	711 # on return r3 bit 1 will indicate whether a DSR is
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	712 # to be posted. Pass this together with a pointer to
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	713 # the interrupt object we have just used to the
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	714 # interrupt tidy up routine.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	715
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	716 # Note that r14 and r15 are defined to be preserved across
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	717 # calls by the calling convention, so they still contain
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	718 # the register dump and the vector number respectively.
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	719
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	720 lwi r4,hal_interrupt_objects # get interrupt object table
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	721 lwzx r4,r4,r15 # load object pointer
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	722 mr r5,r14 # arg3 = saved register dump
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	723
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	724 .extern interrupt_end
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	725 bl interrupt_end # call into C to finish off
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	726 #endif
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	727
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	728 restore_state:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	729 # All done, restore CPU state and continue
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	730
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	731 addi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE*2 # retrieve CPU state pointer
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	732
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	733 # get sprs we want to restore
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	734 # stuff some of them into the CPU
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	735 lwz r3,CYGARC_PPCREG_XER(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	736 lwz r4,CYGARC_PPCREG_LR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	737 lwz r5,CYGARC_PPCREG_CTR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	738 mtxer r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	739 mtlr r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	740 mtctr r5
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	741
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	742 # Restore registers used in vsr (r14+r15)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	743 lwz r14,CYGARC_PPCREG_REGS+14*4(r1)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	744 lwz r15,CYGARC_PPCREG_REGS+15*4(r1)
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	745
443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	746 # restore registers r6..r12/r31
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	747 .set _reg,6
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	748 .rept MAX_SAVE_REG+1-6
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	749 lwz _reg,(CYGARC_PPCREG_REGS+_reg*4)(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	750 .set _reg,_reg+1
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	751 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	752
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	753 hal_cpu_int_disable
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	754
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	755 # restore R0 and R2
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	756 lwz r0,CYGARC_PPCREG_REGS+0*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	757 lwz r2,CYGARC_PPCREG_REGS+2*4(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	758
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	759 # Here all the registers are loaded except
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	760 # sp = HAL_SavedRegisters
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	761 # r3 = ccr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	762 # r4 = srr0 = pc
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	763 # r5 = srr1 = msr
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	764 #
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	765 # We have to disable interrupts while srr0 and
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	766 # srr1 are loaded, since another interrupt will
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	767 # destroy them.
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	768
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	769 lwz r3,CYGARC_PPCREG_CR(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	770 lwz r4,CYGARC_PPCREG_PC(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	771 lwz r5,CYGARC_PPCREG_MSR(sp)
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	772 mtcr r3 # set ccr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	773 mtsrr0 r4 # load old pc
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	774 mtsrr1 r5 # load old msr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	775
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	776 #ifdef CYGDBG_HAL_POWERPC_FRAME_WALLS
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	777 # Mark this frame as (almost) dead.
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	778 lwi r3,0xDDDDDDD0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	779 stw r3,CYGARC_PPCREG_WALL_HEAD(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	780 lwi r3,0xDDDDDDD1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	781 stw r3,CYGARC_PPCREG_WALL_TAIL(sp)
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	782 #endif
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	783
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	784 lwz r3,CYGARC_PPCREG_REGS+3*4(sp) # load r3 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	785 lwz r4,CYGARC_PPCREG_REGS+4*4(sp) # load r4 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	786 lwz r5,CYGARC_PPCREG_REGS+5*4(sp) # load r5 value
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	787 lwz sp,CYGARC_PPCREG_REGS+1*4(sp) # restore sp
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	788
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	789 sync # settle things down
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	790 isync
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	791 rfi # and return
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	792
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	793
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	794
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	795 ##-----------------------------------------------------------------------------
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	796 ## Execute pending DSRs on the interrupt stack with interrupts enabled.
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	797 ## Note: this can only be called from code running on a thread stack
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	798
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	799 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	800 .extern cyg_interrupt_call_pending_DSRs
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	801
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	802 FUNC_START(hal_interrupt_stack_call_pending_DSRs)
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	803 # Change to interrupt stack, save state and set up stack for
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	804 # calls to C code.
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	805 mr r3,sp
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	806 lwi r4,__interrupt_stack
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	807 subi r4,r4,24 # make space on stack
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	808 mr sp,r4
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	809 stw r3,12(sp) # save old sp
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	810 mfmsr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	811 stw r3,16(sp) # save old MSR
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	812 mflr r3
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	813 stw r3,20(sp) # save old LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	814
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	815 li r0,0
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	816 stw r0,0(sp) # clear back chain
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	817 stw r0,8(sp) # zero return pc
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	818
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	819 hal_cpu_int_enable
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	820
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	821 # Call into kernel which will execute DSRs
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	822 stwu sp,-CYGARC_PPC_STACK_FRAME_SIZE(sp)
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	823 bl cyg_interrupt_call_pending_DSRs
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	824 addi sp,sp,CYGARC_PPC_STACK_FRAME_SIZE
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	825
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	826 lwz r3,20(sp) # restore LR
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	827 mtlr r3
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	828 lwz r5,12(sp) # get SP from saved state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	829 lwz r3,16(sp) # restore interrupt setting
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	830 hal_cpu_int_merge r3
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	831
76 435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	832 mr sp,r5 # restore stack pointer
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	833 blr # and return to caller
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST jlarmour parents: 72 diff changeset	834 #endif
10 d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST jlarmour parents: 8 diff changeset	835
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	836 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	837 ## Temporary interrupt stack
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	838
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	839 .section ".bss"
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	840
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	841 .balign 16
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	842 .global cyg_interrupt_stack_base
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	843 cyg_interrupt_stack_base:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	844 __interrupt_stack_base:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	845 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	846 .byte 0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	847 .endr
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	848 .balign 16
8 ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	849 .global cyg_interrupt_stack
ece80412419a Merge from eCos master repository on 1999-05-21-22:05:54-BST jlarmour parents: 2 diff changeset	850 cyg_interrupt_stack:
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	851 __interrupt_stack:
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	852
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	853 .long 0,0,0,0,0,0,0,0
3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	854
2 443894e2e912 Block commit of eCos version 1.2.1 jlarmour parents: 0 diff changeset	855 #---------------------------------------------------------------------------
0 3111d98ba7b3 Initial commit of eCos version 1.1 jlarmour parents: diff changeset	856 # end of vectors.S

Mercurial > flash_v2

annotate packages/hal/powerpc/arch/current/src/vectors.S @ 76:435cced73e2f ecos-v1_3_1-release