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annotate packages/devs/flash/amd/am29xxxxx/current/include/flash_am29xxxxx_parts.inl @ 2820:3616656e48ea

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* include/flash_am29xxxxx_parts.inl: Added Macronix MX29LV128M B part (8- and 16-bit) Added Macronix MX29LV128M T part (8-bit) Added Spansion S29GL128N part (8-bit)
author jlarmour
date Thu, 19 Feb 2009 01:11:25 +0000
parents 74dbf4c3f2e1
children
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1 #ifndef CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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2 #define CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL
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3 //==========================================================================
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4 //
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5 // am29xxxxx_parts.inl
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6 //
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7 // AMD AM29xxxxx part descriptors
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8 //
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9 //==========================================================================
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10 // ####ECOSGPLCOPYRIGHTBEGIN####
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11 // -------------------------------------------
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12 // This file is part of eCos, the Embedded Configurable Operating System.
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2009 Free Software Foundation, Inc.
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14 //
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15 // eCos is free software; you can redistribute it and/or modify it under
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16 // the terms of the GNU General Public License as published by the Free
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17 // Software Foundation; either version 2 or (at your option) any later
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18 // version.
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19 //
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20 // eCos is distributed in the hope that it will be useful, but WITHOUT
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21 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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23 // for more details.
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24 //
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25 // You should have received a copy of the GNU General Public License
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26 // along with eCos; if not, write to the Free Software Foundation, Inc.,
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27 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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28 //
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29 // As a special exception, if other files instantiate templates or use
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30 // macros or inline functions from this file, or you compile this file
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31 // and link it with other works to produce a work based on this file,
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32 // this file does not by itself cause the resulting work to be covered by
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33 // the GNU General Public License. However the source code for this file
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34 // must still be made available in accordance with section (3) of the GNU
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35 // General Public License v2.
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36 //
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37 // This exception does not invalidate any other reasons why a work based
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38 // on this file might be covered by the GNU General Public License.
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39 // -------------------------------------------
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40 // ####ECOSGPLCOPYRIGHTEND####
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41 //==========================================================================
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42 //#####DESCRIPTIONBEGIN####
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43 //
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44 // Author(s): jskov
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45 // Contributors: jskov, Koichi Nagashima
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46 // Date: 2001-06-08
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47 // Purpose:
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48 // Description: AMD AM29xxxxx part descriptors
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49 // Usage: Should be included from the flash_am29xxxxx.inl file only.
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50 //
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51 // FIXME: Add configury for selecting bottom/top bootblocks
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52 //####DESCRIPTIONEND####
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53 //
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54 //==========================================================================
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55
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56 //
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57 // Note: 'bootblocks' are a set of blocks which are treated by
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58 // the driver as a single larger block. This simplifies the driver
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59 // so as to only have to deal with single size blocks (even though
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60 // the physical device may differ). The data structure is laid out as:
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61 // <address of start of boot block area 1>
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62 // <size of sub-block 1>
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63 // <size of sub-block 2>
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64 // ...
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65 // <size of sub-block n>
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66 // <address of start of boot block area 2>
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67 // <size of sub-block 1>
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68 // <size of sub-block 2>
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69 // ...
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70 // <size of sub-block n>
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71 // _LAST_BOOTBLOCK
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72 //
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73 // Finally, when specifying a device with bootblocks, the total number
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74 // of blocks should reflect this collapse, i.e. if the device has 15
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75 // full size blocks and 8 blocks which are 1/8 each, then the total
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76 // should be 16 blocks.
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77 //
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78 #define _LAST_BOOTBLOCK (-1)
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79
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80 #if CYGNUM_FLASH_WIDTH == 8
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81 #ifdef CYGHWR_DEVS_FLASH_AMD_MX29LV128
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82 { // MX29LV128M-B (Bottom-boot)
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83 long_device_id: true,
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84 device_id : FLASHWORD(0x7e),
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85 device_id2 : FLASHWORD(0x11),
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86 device_id3 : FLASHWORD(0x00),
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87 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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88 block_count: 256,
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89 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
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90 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
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91 bootblock : true,
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92 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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93 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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94 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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95 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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96 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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97 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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98 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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99 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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100 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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101 _LAST_BOOTBLOCK
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102 },
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103 banked : false,
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104 bufsiz : 32
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105 },
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106 { // MX29LV128M-T (Top-boot)
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107 long_device_id: true,
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108 device_id : FLASHWORD(0x7e),
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109 device_id2 : FLASHWORD(0x11),
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110 device_id3 : FLASHWORD(0x01),
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111 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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112 block_count: 256,
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113 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
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114 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
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115 bootblock : true,
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116 bootblocks : { 0xff0000 * CYGNUM_FLASH_INTERLEAVE,
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117 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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118 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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119 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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120 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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121 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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122 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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123 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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124 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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125 _LAST_BOOTBLOCK
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126 },
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127 banked : false,
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128 bufsiz : 32
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129 },
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130 #endif
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131 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F002T
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132 { // AM29F002T
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133 device_id : FLASHWORD(0xb0),
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134 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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135 block_count: 4,
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136 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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137 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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138 bootblock : true,
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139 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
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140 0x008000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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diff changeset
141 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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142 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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143 0x004000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
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diff changeset
144 _LAST_BOOTBLOCK
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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diff changeset
145 },
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
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diff changeset
146 banked : false,
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147 bufsiz : 1
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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diff changeset
148 },
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
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diff changeset
149 #endif
1397
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150 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F010
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151 { // AM29F010
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152 device_id : FLASHWORD(0x20),
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153 block_size : 0x4000 * CYGNUM_FLASH_INTERLEAVE,
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154 block_count: 8,
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155 device_size: 0x20000 * CYGNUM_FLASH_INTERLEAVE,
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156 base_mask : ~(0x20000 * CYGNUM_FLASH_INTERLEAVE - 1),
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157 bootblock : false,
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gthomas
parents: 1326
diff changeset
158 banked : false
9c818dd5d9fa Updates for EC555 targets - from Bob Koninckx
gthomas
parents: 1326
diff changeset
159 },
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diff changeset
160 #endif
161
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161 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F040B
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162 { // AM29F040B
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163 device_id : FLASHWORD(0xa4),
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164 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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165 block_count: 8,
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166 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
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167 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
174
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diff changeset
168 bootblock : false,
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169 banked : false,
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170 bufsiz : 1
161
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171 },
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172 #endif
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173 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
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174 { // MBM29LV160-T | AM29LV160-T
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175 device_id : FLASHWORD(0xc4),
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176 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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177 block_count: 32,
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178 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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179 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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180 bootblock : true,
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181 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
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182 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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jlarmour
parents:
diff changeset
183 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
184 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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185 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
186 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
187 },
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188 banked : false,
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189 bufsiz : 1
161
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190 },
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parents:
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191 { // MBM29LV160-B | AM29LV160-B
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192 device_id : FLASHWORD(0x49),
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193 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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194 block_count: 32,
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195 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
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196 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
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197 bootblock : true,
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198 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
199 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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parents:
diff changeset
200 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
201 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
202 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
203 _LAST_BOOTBLOCK
174
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parents: 161
diff changeset
204 },
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205 banked : false,
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206 bufsiz : 1
161
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207 },
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208 #endif
208
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209 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
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210 { // AM29LV200-T
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211 device_id : FLASHWORD(0x3b),
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212 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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213 block_count: 4,
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214 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
215 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents: 201
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216 bootblock : true,
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parents: 201
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217 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
218 0x008000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
219 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
220 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 201
diff changeset
221 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
222 _LAST_BOOTBLOCK
208
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parents: 201
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223 },
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224 banked : false,
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225 bufsiz : 1
208
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parents: 201
diff changeset
226 },
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parents: 201
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227 { // AM29LV200-B
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228 device_id : FLASHWORD(0xbf),
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229 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
230 block_count: 4,
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diff changeset
231 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
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232 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
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233 bootblock : true,
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234 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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235 0x004000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
236 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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diff changeset
237 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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238 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
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parents: 353
diff changeset
239 _LAST_BOOTBLOCK
208
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diff changeset
240 },
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241 banked : false,
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242 bufsiz : 1
208
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parents: 201
diff changeset
243 },
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diff changeset
244 #endif
221
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diff changeset
245 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
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diff changeset
246 { // AM29LV320DT
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diff changeset
247 device_id : FLASHWORD(0xF6),
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248 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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parents: 210
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249 block_count: 64,
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parents: 210
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250 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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251 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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parents: 210
diff changeset
252 bootblock : true,
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diff changeset
253 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
254 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
255 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
256 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
257 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
258 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
259 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
260 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
261 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
262 _LAST_BOOTBLOCK
221
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gthomas
parents: 210
diff changeset
263 },
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264 banked : false,
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parents: 1203
diff changeset
265 bufsiz : 1
221
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parents: 210
diff changeset
266 },
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parents: 210
diff changeset
267 { // AM29LV320D
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parents: 210
diff changeset
268 device_id : FLASHWORD(0xF9),
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parents: 210
diff changeset
269 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
270 block_count: 64,
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gthomas
parents: 210
diff changeset
271 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
272 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
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gthomas
parents: 210
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273 bootblock : true,
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gthomas
parents: 210
diff changeset
274 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
275 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
276 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
277 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
278 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
279 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
280 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
281 0x002000 * CYGNUM_FLASH_INTERLEAVE,
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gthomas
parents: 210
diff changeset
282 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
283 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
284 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
285 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
286 bufsiz : 1
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
287 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
288 #endif
450
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
289 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL322D
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
290 { // AM29DL322D-T
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
291 device_id : FLASHWORD(0x55),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
292 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
293 block_count: 64,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
294 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
295 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
296 bootblock : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
297 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
298 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
299 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
300 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
301 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
302 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
303 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
304 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
305 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
306 _LAST_BOOTBLOCK
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
307 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
308 banked : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
309 banks : { 0x380000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
310 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
311 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
312 bufsiz : 1
450
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
313 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
314 { // AM29DL322D-B
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
315 device_id : FLASHWORD(0x56),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
316 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
317 block_count: 64,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
318 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
319 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
320 bootblock : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
321 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
322 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
323 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
324 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
325 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
326 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
327 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
328 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
329 0x002000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
330 _LAST_BOOTBLOCK
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
331 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
332 banked : true,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
333 banks : { 0x80000 * CYGNUM_FLASH_INTERLEAVE,
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
334 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
335 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
336 bufsiz : 1
450
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
337 },
4dbb32159a9c AM29DL322 Support
msalter
parents: 434
diff changeset
338 #endif
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
339 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL323D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
340 { // AM29DL323D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
341 device_id : FLASHWORD(0x50),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
342 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
343 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
344 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
345 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
346 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
347 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
348 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
349 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
350 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
351 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
352 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
353 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
354 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
355 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
356 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
357 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
358 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
359 banks : { 0x300000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
360 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
361 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
362 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
363 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
364 { // AM29DL323D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
365 device_id : FLASHWORD(0x53),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
366 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
367 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
368 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
369 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
370 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
371 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
372 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
373 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
374 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
375 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
376 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
377 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
378 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
379 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
380 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
381 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
382 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
383 banks : { 0x100000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
384 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
385 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
386 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
387 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
388 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
389 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
390 { // AM29DL324D-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
391 device_id : FLASHWORD(0x5c),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
392 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
393 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
394 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
395 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
396 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
397 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
398 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
399 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
400 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
401 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
402 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
403 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
404 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
405 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
406 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
407 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
408 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
409 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
410 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
411 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
412 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
413 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
414 { // AM29DL324D-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
415 device_id : FLASHWORD(0x5f),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
416 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
417 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
418 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
419 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
420 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
421 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
422 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
423 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
424 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
425 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
426 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
427 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
428 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
429 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
430 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
431 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
432 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
433 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
434 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
435 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
436 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
437 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
438 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
439 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
440 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
441 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
442 device_id : FLASHWORD(0x7e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
443 device_id2 : FLASHWORD(0x02),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
444 device_id3 : FLASHWORD(0x01),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
445 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
446 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
447 device_size: 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
448 base_mask : ~(0x8000000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
449 bootblock : true,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
450 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
451 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
452 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
453 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
454 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
455 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
456 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
457 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
458 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
459 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
460 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
461 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
462 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
463 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
464 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
465 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
466 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
467 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
468 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
469 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
470 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
471 banks : { 0x0700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
472 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
473 0x0100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
474 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
475 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
476 bufsiz : 1
1989
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
477 },
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
478 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
479 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
480 { // AM29F800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
481 device_id : FLASHWORD(0xd6),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
482 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
483 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
484 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
485 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
486 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
487 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
488 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
489 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
490 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
491 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
492 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
493 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
494 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
495 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
496 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
497 { // AM29F800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
498 device_id : FLASHWORD(0x58),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
499 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
500 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
501 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
502 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
503 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
504 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
505 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
506 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
507 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
508 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
509 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
510 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
511 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
512 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
513 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
514 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
515 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
516 { // AM29LV800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
517 device_id : FLASHWORD(0xda),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
518 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
519 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
520 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
521 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
522 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
523 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
524 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
525 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
526 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
527 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
528 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
529 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
530 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
531 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
532 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
533 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
534 device_id : FLASHWORD(0x5b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
535 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
536 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
537 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
538 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
539 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
540 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
541 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
542 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
543 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
544 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
545 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
546 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
547 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
548 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
549 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
550 #endif
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
551 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
552 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
553 device_id : FLASHWORD(0xCE),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
554 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
555 block_count: 16,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
556 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
557 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
558 bootblock : true,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
559 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
560 0x004000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
561 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
562 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
563 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
564 _LAST_BOOTBLOCK
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
565 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
566 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
567 bufsiz : 1
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
568 },
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
569 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
570
1321
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
571 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV081B
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
572 { // AM29LV081B
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
573 device_id : FLASHWORD(0x38),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
574 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
575 block_count: 16,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
576 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
577 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
578 bootblock : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
579 banked : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
580 bufsiz : 1
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
581 },
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
582 #endif
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
583
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
584 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV017D
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
585 { // AM29LV017D
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
586 device_id : FLASHWORD(0xC8),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
587 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
588 block_count: 32,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
589 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
590 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
591 bootblock : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
592 banked : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
593 bufsiz : 1
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
594 },
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
595 #endif
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
596
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
597 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV033C
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
598 { // AM29LV033C
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
599 device_id : FLASHWORD(0xA3),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
600 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
601 block_count: 64,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
602 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
603 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
604 bootblock : false,
1326
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
605 // Although this device is not a true banked device, we
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
606 // treat the device as having two banks to get the
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
607 // Sector Protect Verify to work for the upper half of
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
608 // the device. Reference Note 9 for Table 9 in the
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
609 // AMD data sheet.
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
610 banked : true,
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
611 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
612 0
80fa78c1b074 Fix bank issue on AM29LV033C - Jay Foster
gthomas
parents: 1321
diff changeset
613 },
1321
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
614 bufsiz : 1
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
615 },
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
616 #endif
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
617
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
618 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV065D
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
619 { // AM29LV065D
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
620 device_id : FLASHWORD(0x93),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
621 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
622 block_count: 128,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
623 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
624 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
625 bootblock : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
626 banked : false,
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
627 bufsiz : 1
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
628 },
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
629 #endif
83e860bfbcaa More AMD devices from Jay Foster
gthomas
parents: 1210
diff changeset
630
2820
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
631 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128N
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
632 { // AMD/SPANSION S29GL128N
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
633 long_device_id: true,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
634 device_id : FLASHWORD(0x7e),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
635 device_id2 : FLASHWORD(0x21),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
636 device_id3 : FLASHWORD(0x01),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
637 block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
638 block_count: 128,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
639 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
640 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
641 bootblock : false,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
642 banked : false,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
643 bufsiz : 32,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
644 },
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
645 #endif
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
646
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
647 #else // 16 bit devices
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
648
1203
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
649 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV128
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
650 { // AM29LV128
1989
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
651 long_device_id: true,
1203
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
652 device_id : FLASHWORD(0x227e),
1989
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
653 device_id2 : FLASHWORD(0x2212),
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
654 device_id3 : FLASHWORD(0x2200),
1203
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
655 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
656 block_count: 256,
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
657 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
658 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
659 bootblock : false,
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
660 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
661 bufsiz : 16
1203
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
662 },
de0f96386f4f Add support for 29LV128
gthomas
parents: 1164
diff changeset
663 #endif
2180
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
664 #ifdef CYGHWR_DEVS_FLASH_AMD_MX29LV128
2820
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
665 { // MX29LV128M-B
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
666 long_device_id: true,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
667 device_id : FLASHWORD(0x227e),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
668 device_id2 : FLASHWORD(0x2211),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
669 device_id3 : FLASHWORD(0x2200),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
670 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
671 block_count: 256,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
672 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
673 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
674 bootblock : true,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
675 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
676 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
677 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
678 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
679 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
680 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
681 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
682 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
683 0x002000 * CYGNUM_FLASH_INTERLEAVE,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
684 _LAST_BOOTBLOCK
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
685 },
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
686 banked : false,
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
687 bufsiz : 16
3616656e48ea * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 2729
diff changeset
688 },
2180
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
689 { // MX29LV128M-T
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
690 long_device_id: true,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
691 device_id : FLASHWORD(0x227e),
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
692 device_id2 : FLASHWORD(0x2211),
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
693 device_id3 : FLASHWORD(0x2201),
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
694 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
695 block_count: 256,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
696 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
697 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
698 bootblock : true,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
699 bootblocks : { 0xff0000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
700 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
701 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
702 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
703 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
704 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
705 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
706 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
707 0x002000 * CYGNUM_FLASH_INTERLEAVE,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
708 _LAST_BOOTBLOCK
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
709 },
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
710 banked : false,
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
711 bufsiz : 16
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
712 },
c1e37181a6da * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_MX29LV128]:
asl
parents: 2152
diff changeset
713 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
714 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
715 { // MBM29LV160-T | AM29LV160-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
716 device_id : FLASHWORD(0x22c4),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
717 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
718 block_count: 32,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
719 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
720 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
721 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
722 bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
723 0x008000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
724 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
725 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
726 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
727 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
728 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
729 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
730 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
731 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
732 { // MBM29LV160-B | AM29LV160-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
733 device_id : FLASHWORD(0x2249),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
734 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
735 block_count: 32,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
736 device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
737 base_mask : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
738 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
739 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
740 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
741 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
742 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
743 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
744 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
745 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
746 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
747 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
748 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
749 #endif
1164
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
750 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29PL160
1582
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
751 { // AM29PL160-T
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
752 device_id : FLASHWORD(0x2227),
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
753 block_size : 0x00040000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
754 block_count: 8,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
755 device_size: 0x00200000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
756 base_mask : ~(0x00200000 * CYGNUM_FLASH_INTERLEAVE - 1),
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
757 bootblock : true,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
758 bootblocks : { 0x1c0000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
759 0x038000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
760 0x002000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
761 0x002000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
762 0x004000 * CYGNUM_FLASH_INTERLEAVE,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
763 _LAST_BOOTBLOCK
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
764 },
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
765 banked : false,
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
766 bufsiz : 1
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
767 },
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
768 { // AM29PL160-B
1164
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
769 device_id : FLASHWORD(0x2245),
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
770 block_size : 0x00040000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
771 block_count: 8,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
772 device_size: 0x00200000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
773 base_mask : ~(0x00200000 * CYGNUM_FLASH_INTERLEAVE - 1),
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
774 bootblock : true,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
775 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
776 0x004000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
777 0x002000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
778 0x002000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
779 0x038000 * CYGNUM_FLASH_INTERLEAVE,
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
780 _LAST_BOOTBLOCK
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
781 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
782 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
783 bufsiz : 1
1164
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
784 },
2fe7cd7dffaa Add support for the AM29PL160.
bartv
parents: 1132
diff changeset
785 #endif
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
786 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV200
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
787 { // AM29LV200-T
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
788 device_id : FLASHWORD(0x223b),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
789 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
790 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
791 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
792 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
793 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
794 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
795 0x008000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
796 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
797 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
798 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
799 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
800 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
801 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
802 bufsiz : 1
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
803 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
804 { // AM29LV200-B
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
805 device_id : FLASHWORD(0x22bf),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
806 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
807 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
808 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
809 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
810 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
811 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
812 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
813 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
814 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
815 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
816 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
817 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
818 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
819 bufsiz : 1
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
820 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
821 #endif
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
822 #ifdef CYGHWR_DEVS_FLASH_ST_M29W200B
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
823 { // ST M29W200BT
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
824 device_id : FLASHWORD(0x0051),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
825 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
826 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
827 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
828 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
829 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
830 bootblocks : { 0x030000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
831 0x008000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
832 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
833 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
834 0x004000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
835 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
836 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
837 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
838 bufsiz : 1
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
839 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
840 { // ST M29W200BB
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
841 device_id : FLASHWORD(0x0057),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
842 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
843 block_count: 4,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
844 device_size: 0x40000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
845 base_mask : ~(0x40000 * CYGNUM_FLASH_INTERLEAVE - 1),
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
846 bootblock : true,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
847 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
848 0x004000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
849 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
850 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
851 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
852 _LAST_BOOTBLOCK
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
853 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
854 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
855 bufsiz : 1
208
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
856 },
e0c0827131d1 Merge from eCos master repository on 2002-05-20-20:11:54-BST
jlarmour
parents: 201
diff changeset
857 #endif
2270
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
858 #ifdef CYGHWR_DEVS_FLASH_ST_M29W320D
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
859 { // M29W320DT
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
860 device_id : FLASHWORD(0x22ca),
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
861 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
862 block_count: 64,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
863 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
864 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
865 bootblock : true,
2328
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
866 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE, // offset
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
867 0x008000 * CYGNUM_FLASH_INTERLEAVE, // size 1
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
868 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 2
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
869 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 3
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
870 0x004000 * CYGNUM_FLASH_INTERLEAVE, // size 4
2270
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
871 _LAST_BOOTBLOCK
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
872 },
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
873 banked : false,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
874 bufsiz : 1
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
875 },
2328
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
876 { // M29W320DB
2270
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
877 device_id : FLASHWORD(0x22cb),
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
878 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
879 block_count: 64,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
880 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
881 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
882 bootblock : true,
2328
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
883 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE, // offset
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
884 0x004000 * CYGNUM_FLASH_INTERLEAVE, // size 1
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
885 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 2
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
886 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 3
9ee188e11ee6 * Fixed boot sectors for ST M29W320D
asl
parents: 2278
diff changeset
887 0x008000 * CYGNUM_FLASH_INTERLEAVE, // size 4
2270
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
888 _LAST_BOOTBLOCK
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
889 },
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
890 banked : false,
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
891 bufsiz : 1
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
892 },
0b2803660786 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_ST_M29W320D]:
asl
parents: 2180
diff changeset
893 #endif
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
894 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
895 { // AM29LV320DT
587
98fc8f919755 Fix ID code for AM29LV320DT
gthomas
parents: 523
diff changeset
896 device_id : FLASHWORD(0x22F6),
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
897 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
898 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
899 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
900 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
901 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
902 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
903 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
904 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
905 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
906 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
907 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
908 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
909 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
910 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
911 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
912 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
913 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
914 bufsiz : 1
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
915 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
916 { // AM29LV320D
434
c4fa19c99259 Improve 16as8 functionality
gthomas
parents: 363
diff changeset
917 device_id : FLASHWORD(0x22F9),
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
918 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
919 block_count: 64,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
920 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
921 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
922 bootblock : true,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
923 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
924 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
925 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
926 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
927 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
928 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
929 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
930 0x002000 * CYGNUM_FLASH_INTERLEAVE,
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
931 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
932 _LAST_BOOTBLOCK
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
933 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
934 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
935 bufsiz : 1
221
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
936 },
6a3479d240be Update for 320D. Support cache flush/disable
gthomas
parents: 210
diff changeset
937 #endif
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
938 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL322D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
939 { // AM29DL322D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
940 device_id : FLASHWORD(0x2255),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
941 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
942 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
943 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
944 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
945 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
946 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
947 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
948 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
949 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
950 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
951 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
952 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
953 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
954 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
955 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
956 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
957 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
958 banks : { 0x380000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
959 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
960 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
961 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
962 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
963 { // AM29DL322D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
964 device_id : FLASHWORD(0x2256),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
965 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
966 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
967 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
968 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
969 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
970 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
971 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
972 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
973 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
974 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
975 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
976 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
977 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
978 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
979 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
980 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
981 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
982 banks : { 0x80000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
983 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
984 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
985 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
986 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
987 #endif
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
988 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL323D
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
989 { // AM29DL323D-T
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
990 device_id : FLASHWORD(0x2250),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
991 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
992 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
993 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
994 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
995 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
996 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
997 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
998 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
999 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1000 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1001 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1002 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1003 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1004 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1005 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1006 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1007 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1008 banks : { 0x300000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1009 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1010 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1011 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1012 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1013 { // AM29DL323D-B
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1014 device_id : FLASHWORD(0x2253),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1015 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1016 block_count: 64,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1017 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1018 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1019 bootblock : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1020 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1021 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1022 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1023 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1024 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1025 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1026 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1027 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1028 0x002000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1029 _LAST_BOOTBLOCK
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1030 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1031 banked : true,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1032 banks : { 0x100000 * CYGNUM_FLASH_INTERLEAVE,
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1033 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1034 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1035 bufsiz : 1
523
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1036 },
e2af62683ba0 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29DL640D):
jlarmour
parents: 450
diff changeset
1037 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1038 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL324D
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1039 { // AM29DL324D-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1040 device_id : FLASHWORD(0x225c),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1041 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1042 block_count: 64,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1043 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1044 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1045 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1046 bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1047 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1048 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1049 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1050 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1051 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1052 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1053 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1054 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1055 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1056 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1057 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1058 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1059 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1060 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1061 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1062 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1063 { // AM29DL324D-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1064 device_id : FLASHWORD(0x225f),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1065 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1066 block_count: 64,
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1067 device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1068 base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1069 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1070 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1071 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1072 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1073 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1074 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1075 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1076 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1077 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1078 0x002000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1079 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1080 },
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1081 banked : true,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1082 banks : { 0x200000 * CYGNUM_FLASH_INTERLEAVE,
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1083 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1084 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1085 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1086 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1087 #endif
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1088 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1089 { // AM29DL640D
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1090 long_device_id: true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1091 device_id : FLASHWORD(0x227e),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1092 device_id2 : FLASHWORD(0x2202),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1093 device_id3 : FLASHWORD(0x2201),
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1094 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1095 block_count: 128,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1096 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1097 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1098 bootblock : true,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1099 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1100 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1101 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1102 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1103 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1104 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1105 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1106 0x2000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1107 0x2000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1108 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1109 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1110 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1111 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1112 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1113 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1114 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1115 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1116 0x2000 * CYGNUM_FLASH_INTERLEAVE,
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1117 _LAST_BOOTBLOCK
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1118 },
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1119 banked : true,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1120 banks : { 0x700000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1121 0x400000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1122 0x100000 * CYGNUM_FLASH_INTERLEAVE,
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1123 0
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1124 },
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1125 bufsiz : 1
1582
410822b9fdd5 * include/flash_am29xxxxx_parts.inl: Added support for AM29PL160 top
asl
parents: 1397
diff changeset
1126 },
353
9c7f9b4dfb2f * include/flash_am29xxxxx_parts.inl:
jlarmour
parents: 221
diff changeset
1127 #endif
1132
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1128 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV400
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1129 { // AM29LV400-T
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1130 device_id : FLASHWORD(0x22b9),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1131 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1132 block_count: 8,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1133 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1134 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1135 bootblock : true,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1136 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1137 0x08000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1138 0x02000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1139 0x02000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1140 0x04000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1141 _LAST_BOOTBLOCK
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1142 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1143 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1144 bufsiz : 1
1132
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1145 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1146 { // AM29LV400-B
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1147 device_id : FLASHWORD(0x22ba),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1148 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1149 block_count: 8,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1150 device_size: 0x80000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1151 base_mask : ~(0x80000 * CYGNUM_FLASH_INTERLEAVE - 1),
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1152 bootblock : true,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1153 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1154 0x004000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1155 0x002000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1156 0x002000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1157 0x008000 * CYGNUM_FLASH_INTERLEAVE,
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1158 _LAST_BOOTBLOCK
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1159 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1160 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1161 bufsiz : 1
1132
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1162 },
50e2b50c6ea7 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_AM29LV400):
asl
parents: 587
diff changeset
1163 #endif
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1164 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29F800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1165 { // AM29F800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1166 device_id : FLASHWORD(0x22d6),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1167 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1168 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1169 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1170 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1171 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1172 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1173 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1174 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1175 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1176 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1177 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1178 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1179 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1180 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1181 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1182 { // AM29F800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1183 device_id : FLASHWORD(0x2258),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1184 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1185 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1186 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1187 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1188 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1189 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1190 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1191 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1192 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1193 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1194 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1195 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1196 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1197 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1198 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1199 #endif
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1200 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV800
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1201 { // AM29LV800-T
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1202 device_id : FLASHWORD(0x22da),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1203 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1204 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1205 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1206 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1207 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1208 bootblocks : { 0xf0000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1209 0x08000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1210 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1211 0x02000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1212 0x04000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1213 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1214 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1215 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1216 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1217 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1218 { // AM29LV800-B
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1219 device_id : FLASHWORD(0x225b),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1220 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1221 block_count: 16,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1222 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1223 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1224 bootblock : true,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1225 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1226 0x004000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1227 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1228 0x002000 * CYGNUM_FLASH_INTERLEAVE,
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1229 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1230 _LAST_BOOTBLOCK
174
38892b97b685 Merge from eCos master repository on 2001-07-28-00:17:32-BST
jlarmour
parents: 161
diff changeset
1231 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1232 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1233 bufsiz : 1
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1234 },
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1235 #endif
195
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1236 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV640
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1237 { // MBM29LV640xx
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1238 device_id : FLASHWORD(0x22d7),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1239 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1240 block_count: 128,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1241 device_size: 0x800000 * CYGNUM_FLASH_INTERLEAVE,
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1242 base_mask : ~(0x800000 * CYGNUM_FLASH_INTERLEAVE - 1),
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1243 bootblock : false,
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1244 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1245 bufsiz : 1
195
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1246 },
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1247 #endif
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1248 #ifdef CYGHWR_DEVS_FLASH_AMD_TC58FVB800
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1249 { // Toshiba TC58FVB800 (compatible with AM29LV800-B except for IDs.)
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1250 device_id : FLASHWORD(0xCE),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1251 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1252 block_count: 16,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1253 device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1254 base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1255 bootblock : true,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1256 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1257 0x004000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1258 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1259 0x002000 * CYGNUM_FLASH_INTERLEAVE,
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1260 0x008000 * CYGNUM_FLASH_INTERLEAVE,
363
5b4cd8e2de16 New port for Allied Telesyn TS1000 (PowerPC 855T)
gthomas
parents: 353
diff changeset
1261 _LAST_BOOTBLOCK
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1262 },
1210
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1263 banked : false,
786683319633 Add buffered writes - from Thomas Koeller
gthomas
parents: 1203
diff changeset
1264 bufsiz : 1
201
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1265 },
dd81b18e45fb Merge from eCos master repository on 2002-01-04-06:43:04-GMT
jlarmour
parents: 195
diff changeset
1266 #endif
1989
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1267 #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV256
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1268 { // AMD AM29LV256
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1269 long_device_id: true,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1270 device_id : FLASHWORD(0x227e),
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1271 device_id2 : FLASHWORD(0x2212),
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1272 device_id3 : FLASHWORD(0x2201),
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1273 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1274 block_count: 512,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1275 device_size: 0x2000000 * CYGNUM_FLASH_INTERLEAVE,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1276 base_mask : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1277 bootblock : false,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1278 banked : false,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1279 bufsiz : 16,
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1280 },
c5a82c292315 * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_AM29F002T]:
asl
parents: 1912
diff changeset
1281 #endif
1912
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1282 #ifdef CYGHWR_DEVS_FLASH_AMD_S29PL032J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1283 { // S29PL032J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1284 long_device_id: true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1285 device_id : FLASHWORD(0x227e),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1286 device_id2 : FLASHWORD(0x220a),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1287 device_id3 : FLASHWORD(0x2201),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1288 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1289 block_count: 64,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1290 device_size: 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1291 base_mask : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1292 bootblock : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1293 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1294 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1295 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1296 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1297 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1298 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1299 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1300 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1301 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1302 0x3F0000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1303 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1304 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1305 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1306 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1307 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1308 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1309 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1310 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1311 _LAST_BOOTBLOCK
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1312 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1313 banked : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1314 banks : { 0x0380000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1315 0x0200000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1316 0x0080000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1317 0
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1318 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1319 bufsiz : 1
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1320 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1321 #endif
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1322 #ifdef CYGHWR_DEVS_FLASH_AMD_S29PL064J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1323 { // S29PL064J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1324 long_device_id: true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1325 device_id : FLASHWORD(0x227e),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1326 device_id2 : FLASHWORD(0x2202),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1327 device_id3 : FLASHWORD(0x2201),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1328 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1329 block_count: 128,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1330 device_size: 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1331 base_mask : ~(0x8000000 * CYGNUM_FLASH_INTERLEAVE - 1),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1332 bootblock : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1333 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1334 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1335 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1336 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1337 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1338 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1339 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1340 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1341 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1342 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1343 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1344 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1345 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1346 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1347 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1348 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1349 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1350 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1351 _LAST_BOOTBLOCK
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1352 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1353 banked : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1354 banks : { 0x0700000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1355 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1356 0x0100000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1357 0
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1358 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1359 bufsiz : 1
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1360 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1361 #endif
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1362 #ifdef CYGHWR_DEVS_FLASH_AMD_S29PL127J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1363 { // S29PL127J
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1364 long_device_id: true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1365 device_id : FLASHWORD(0x227e),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1366 device_id2 : FLASHWORD(0x2220),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1367 device_id3 : FLASHWORD(0x2200),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1368 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1369 block_count: 256,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1370 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1371 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1372 bootblock : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1373 bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1374 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1375 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1376 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1377 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1378 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1379 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1380 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1381 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1382 0xFF0000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1383 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1384 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1385 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1386 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1387 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1388 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1389 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1390 0x2000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1391 _LAST_BOOTBLOCK
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1392 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1393 banked : true,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1394 banks : { 0x0e00000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1395 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1396 0x0200000 * CYGNUM_FLASH_INTERLEAVE,
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1397 0
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1398 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1399 bufsiz : 1
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1400 },
1a27120cada4 Add support for Spansion devices - from Peter Korsgaard
gthomas
parents: 1896
diff changeset
1401 #endif
1896
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1402 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL064M
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1403 { // AMD/SPANSION S29GL064M
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1404 long_device_id: true,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1405 device_id : FLASHWORD(0x227e),
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1406 device_id2 : FLASHWORD(0x2210),
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1407 device_id3 : FLASHWORD(0x2201),
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1408 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1409 block_count: 128,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1410 device_size: 0x0800000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1411 base_mask : ~(0x8000000 * CYGNUM_FLASH_INTERLEAVE - 1),
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1412 bootblock : true,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1413 bootblocks : { 0x00000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1414 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1415 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1416 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1417 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1418 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1419 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1420 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1421 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1422 0x7F0000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1423 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1424 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1425 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1426 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1427 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1428 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1429 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1430 0x2000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1431 _LAST_BOOTBLOCK
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1432 },
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1433 banked : true,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1434 banks : { 0x0700000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1435 0x0400000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1436 0x0100000 * CYGNUM_FLASH_INTERLEAVE,
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1437 0
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1438 },
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1439 bufsiz : 1
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1440 },
e21d4076a354 * include/flash_am29xxxxx_parts.inl (CYGHWR_DEVS_FLASH_AMD_S29GL064M):
asl
parents: 1582
diff changeset
1441 #endif
2152
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1442 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1443 { // AMD/SPANSION S29GL128N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1444 long_device_id: true,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1445 device_id : FLASHWORD(0x227e),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1446 device_id2 : FLASHWORD(0x2221),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1447 device_id3 : FLASHWORD(0x2201),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1448 block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1449 block_count: 128,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1450 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1451 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1452 bootblock : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1453 banked : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1454 bufsiz : 16,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1455 },
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1456 #endif
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1457 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL256N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1458 { // AMD/SPANSION S29GL256N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1459 long_device_id: true,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1460 device_id : FLASHWORD(0x227e),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1461 device_id2 : FLASHWORD(0x2222),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1462 device_id3 : FLASHWORD(0x2201),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1463 block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1464 block_count: 256,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1465 device_size: 0x2000000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1466 base_mask : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1467 bootblock : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1468 banked : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1469 bufsiz : 16,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1470 },
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1471 #endif
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1472 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL512N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1473 { // AMD/SPANSION S29GL512N
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1474 long_device_id: true,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1475 device_id : FLASHWORD(0x227e),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1476 device_id2 : FLASHWORD(0x2223),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1477 device_id3 : FLASHWORD(0x2201),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1478 block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1479 block_count: 512,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1480 device_size: 0x4000000 * CYGNUM_FLASH_INTERLEAVE,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1481 base_mask : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1),
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1482 bootblock : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1483 banked : false,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1484 bufsiz : 16,
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1485 },
a98455a6572f * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128N]:
asl
parents: 1989
diff changeset
1486 #endif
2278
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1487 #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128M
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1488 { // AMD/SPANSION S29GL128M
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1489 long_device_id: true,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1490 device_id : FLASHWORD(0x227e),
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1491 device_id2 : FLASHWORD(0x2212),
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1492 device_id3 : FLASHWORD(0x2200),
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1493 block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1494 block_count: 256,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1495 device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1496 base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1497 bootblock : false,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1498 banked : false,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1499 bufsiz : 16,
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1500 },
aa9bc5b59c2b * include/flash_am29xxxxx_parts.inl [CYGHWR_DEVS_FLASH_AMD_S29GL128M]:
asl
parents: 2270
diff changeset
1501 #endif
195
67850532eebb Merge from eCos master repository on 2001-11-02-06:43:03-GMT
jlarmour
parents: 174
diff changeset
1502
161
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1503 #endif // 16 bit devices
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1504
ac086aa3217e Merge from eCos master repository on 2001-06-08-21:11:51-BST
jlarmour
parents:
diff changeset
1505 #endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL