Mercurial > ecos
annotate packages/hal/cortexm/kinetis/var/current/ChangeLog @ 3273:04cc2ad81e4f
Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
| author | vae |
|---|---|
| date | Sun, 16 Feb 2014 08:30:33 +0000 |
| parents | a99daf62e693 |
| children | a62acc61759e |
| rev | line source |
|---|---|
|
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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1 2014-02-13 Ilija Kocho <ilijak@siva.com.mk> |
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04cc2ad81e4f
Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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2 |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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3 * cortexm/kinetis/var/current/include/var_intr.h: |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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4 Add interrupt numbers for second eDMA controller. |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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5 |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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6 * cortexm/kinetis/var/current/include/var_io_clkgat.h: |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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7 Add clock gating for ADC2 |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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8 |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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9 * cortexm/kinetis/var/current/include/var_io_gpio.h: |
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Add interrupt numbers for second eDMA controller. Add clock gating for ADC2. Add GPIO port F.
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10 Add GPIO port F. |
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11 |
| 3272 | 12 2013-04-28 Ilija Kocho <ilijak@siva.com.mk> |
| 13 | |
| 14 * include/var_intr.h : Redefine CYGNUM_HAL_INTERRUPT_RTC_RTC because of | |
| 15 conflict with same named macro defined in hal_intr.h (Cortex-M architecture). | |
| 16 Define some interrrupt numbers, previously reservrd. | |
| 17 * include/var_io.h : Upgrade RTC registers. [ Bugzilla 1001904 ] | |
| 18 | |
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04f96179ad68
Clean up macros to support interrupts and set/get features.
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19 2013-06-12 Mike Jones <mike@proclivis.com> |
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Clean up macros to support interrupts and set/get features.
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20 |
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Clean up macros to support interrupts and set/get features.
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21 * include/var_io_gpio.h |
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Clean up macros to support interrupts and set/get features.
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22 Clean up macros to support interrupts and set/get features. |
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Clean up macros to support interrupts and set/get features.
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23 |
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1b3a6c3f449e
Add FlexBus RAM configuration and caching, DDRAM CDL moved
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24 2013-04-28 Ilija Kocho <ilijak@siva.com.mk> |
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25 |
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26 * cdl/hal_cortexm_kinetis.cdl: |
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27 * cdl/kinetis_ddram.cdl: (New file) |
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28 * cdl/kinetis_fbram.cdl: (New file) |
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29 Add FlexBus RAM configuration and caching, DDRAM CDL moved |
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30 to a separate file. Updated FlexNVM configuration with 512KiB FlexNVM |
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31 and 16KiB FlexMemory. |
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32 * cdl/kinetis_clocking.cdl: CYGINT_HAL_CORTEXM_KINETIS_150 |
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33 moved to hal_cortexm_kinetis.cdl |
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34 * include/var_io_lmem.h, include/hal_cache.h: Add more cache functions. |
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35 [ Bugzilla 1001837 ] |
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36 |
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Add Freescale I2C driver and I2C driver entries for Kinetis targets
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37 2013-04-09 Tomas Frydrych <tomas@sleepfive.com> |
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Add Freescale I2C driver and I2C driver entries for Kinetis targets
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38 |
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39 * cdl/kinetis_irq_scheme.cdl: |
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40 * include/var_io_devs.h: |
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41 Implemented support for I2C [Bugzilla 1001397] |
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42 |
| 3218 | 43 2013-04-01 Ilija Kocho <ilijak@siva.com.mk> |
| 44 | |
| 45 * include/var_io.h, include/var_io_clkgat.h, include/var_io_devs.h, | |
| 46 * src/hal_diag.c, src/kinetis_ddram.c, src/kinetis_misc.c | |
| 47 Add clock gating management and API. [ Bugzilla 1001814 ] | |
| 48 | |
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* cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to
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49 2012-11-06 Ilija Kocho <ilijak@siva.com.mk> |
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* cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to
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50 |
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* cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to
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51 * cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to |
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52 addition of archhitectural hardware floating point support. |
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* cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to
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53 CYGHWR_HAL_CORTEXM_KINETIS_FPU and CYGHWR_HAL_CORTEXM_KINETIS_FLEXNVM |
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* cdl/hal_cortexm_kinetis.cdl: Changes to Kinetis part builder related to
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54 look and feel like other name building options. Added new Kinetis |
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55 members to part selection. |
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56 * include/var_io.h, src/kinetis_misc.c: Enumerated PORT F. |
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57 [Bugzilla 1001607] |
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58 |
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Define register access to FTFL module. Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561]
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59 2012-11-04 Ilija Kocho <ilijak@siva.com.mk> |
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60 |
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Define register access to FTFL module. Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561]
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61 * include/var_io.h: Define register access to FTFL module. |
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Define register access to FTFL module. Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561]
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62 Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561] |
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Define register access to FTFL module. Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561]
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63 |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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64 2012-09-28 Ilija Kocho <ilijak@siva.com.mk> |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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65 |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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66 * var/current/cdl/hal_cortexm_kinetis.cdl |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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67 * var/current/cdl/kinetis_clocking.cdl |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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68 * var/current/doc/kinetis.sgml |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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69 * var/current/include/hal_cache.h |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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70 * var/current/include/var_io_ddrmc.h |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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71 * var/current/include/var_io_lmem.h |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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72 * var/current/src/kinetis_ddram.c |
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Define register access to FTFL module. Contributed by Nicolas Aujoux at 2012-09-07 [Bugzilla 1001561]
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73 * var/current/src/kinetis_misc.c: |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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74 Separate data and code caches, as well as text indentation suggested by Jifl. |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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75 Fixes to cache and SDRAM CDL and functions Improved SDRAM controller |
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068fbe2304f1
Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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76 support due to better manufacturer documentation: Configurable pad control. |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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77 [Bugzilla 1001606] |
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Separate data and code caches, as well as text indentation suggested by Jifl. Fixes to cache and SDRAM CDL and functions Improved SDRAM controller support due to better manufacturer documentation: Configurable pad control. [Bugzilla 1001606]
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78 |
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Add functions and macros for clock gating control to Kinetis.
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79 2012-08-01 Ilija Kocho <ilijak@siva.com.mk> |
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Add functions and macros for clock gating control to Kinetis.
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80 |
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Add functions and macros for clock gating control to Kinetis.
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81 * include/var_io.h, src/kinetis_misc.c: Add functions and macros |
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82 for clock gating control to Kinetis. [Bugzilla 1001642] |
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Add functions and macros for clock gating control to Kinetis.
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83 |
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Provide for cache enablement in RAM startup mode [Bugzilla 1001606]
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84 2012-05-18 Ilija Kocho <ilijak@siva.com.mk> |
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Provide for cache enablement in RAM startup mode [Bugzilla 1001606]
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85 |
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86 * include/hal_cache.h, src/kinetis_misc.c: Provide for cache |
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87 enablement in RAM startup mode [Bugzilla 1001606] |
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88 |
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* twr_k40x256/current/cdl/hal_cortexm_kinetis_twr_k40x256.cdl,
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89 2012-05-19 John Dallaway <john@dallaway.org.uk> |
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90 |
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* twr_k40x256/current/cdl/hal_cortexm_kinetis_twr_k40x256.cdl,
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91 * doc/kinetis.sgml: Close <para> and <refsect2> blocks. |
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92 * cdl/hal_cortexm_kinetis.cdl: Reference per-package documentation. |
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93 |
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58eda6fed5a5
New files -- Kinetis variant documentation. [Bug 1001580]
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94 2012-05-18 Ilija Kocho <ilijak@siva.com.mk> |
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New files -- Kinetis variant documentation. [Bug 1001580]
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95 |
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New files -- Kinetis variant documentation. [Bug 1001580]
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96 * doc/kinetis_begin.sgml: |
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New files -- Kinetis variant documentation. [Bug 1001580]
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97 * doc/kinetis_end.sgml: |
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New files -- Kinetis variant documentation. [Bug 1001580]
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98 * doc/kinetis.sgml: |
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New files -- Kinetis variant documentation. [Bug 1001580]
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99 New files -- Kinetis variant documentation. [Bug 1001580] |
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New files -- Kinetis variant documentation. [Bug 1001580]
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100 |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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101 2012-05-17 Ilija Kocho <ilijak@siva.com.mk> |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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102 |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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103 * cdl/hal_cortexm_kinetis.cdl: |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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104 Bug fix: Do not refer external memory if Platform startup is |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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105 not selected. [ Bugzilla 1001590 ] |
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Bug fix: Do not refer external memory if Platform startup is not selected. [ Bugzilla 1001590 ]
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106 |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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107 2012-05-04 Ilija Kocho <ilijak@siva.com.mk> |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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108 |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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109 * cdl/hal_cortexm_kinetis.cdl: |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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110 * src/kinetis_clocking.cdl: |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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111 * src/kinetis_clocking.c: |
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Add: Clocking support for PLL1 (K70), DDRAM controller Cache, eDMA - 32 chan. [Bugzilla 1001579
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112 * include/hal_cache.h |
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113 * include/var_io_lmem.h: |
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114 * include/var_io_ddrmc.h: |
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115 * include/var_io_devs.h: |
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116 * include/var_io.h: |
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117 * src/kinetis_ddram.c: |
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118 * src/kinetis_misc.c: |
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119 Add: Clocking support for PLL1 (K70), DDRAM controller |
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120 Cache, eDMA - 32 chan. [Bugzilla 1001579] |
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121 |
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122 2012-01-11 Tomas Frydrych <tomas@sleepfive.com> |
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123 |
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124 * include/var_io.h: |
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125 Allow for overriding of CYGHWR_HAL_KINETIS_SIM_SCGC?_ALL_M mask |
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126 from platform definitions. |
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127 |
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128 * include/var_io_devs.h: |
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129 Define base pointer for SLCD controller |
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130 |
| 3087 | 131 2012-01-05 Ilija Kocho <ilijak@siva.com.mk> |
| 132 | |
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133 * cdl/kinetis_irq_scheme.cdl |
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134 Centralized IRQ priority scheme. |
| 3087 | 135 |
| 136 * cdl/hal_cortexm_kinetis.cdl: | |
| 137 * cdl/kinetis_flexbus.cdl | |
| 138 * include/var_io_devs.h: | |
| 139 * include/var_io.h: | |
| 140 * src/kinetis_clocking.c: | |
| 141 * src/kinetis_misc.c: | |
| 142 Add I/O defs for eDMA, DSPI. Add flexbus control. | |
| 143 CYG_HAL_STARTUP parenthed bt CYG_HAL_STARTUP_ENV. | |
| 144 Early clock start [Bugzilla 1001450] | |
| 145 | |
| 3069 | 146 2011-11-15 Tomas Frydrych <tomas@sleepfive.com> |
| 147 | |
| 148 * include/var_io_gpio.h: | |
| 149 Convenience macros for manipulating GPIO pins. | |
| 150 | |
| 3056 | 151 2011-10-19 Ilija Kocho <ilijak@siva.com.mk> |
| 152 | |
| 153 * cdl/hal_cortexm_kinetis.cdl: | |
| 154 * cdl/kinetis_clocking.cdl: | |
| 155 * src/hal_diag.c: | |
| 156 * src/kinetis_misc.c: | |
| 157 * src/kinetis_clocking.c: | |
| 158 * include/hal_cache.h: | |
| 159 * include/hal_diag.h: | |
| 160 * include/plf_stub.h: | |
| 161 * include/variant.inc: | |
| 162 * include/var_arch.h: | |
| 163 * include/var_intr.h: | |
| 164 * include/var_io.h: | |
| 165 * include/var_io_devs.h: | |
| 166 * include/var_io_flexbus.h: | |
| 167 * include/pkgconf/mlt_kinetis_flash_sram2s_rom.h | |
| 168 * include/pkgconf/mlt_kinetis_flash_sram2s_rom.ldi | |
| 169 * include/pkgconf/mlt_kinetis_flash_sram2s_sram.h | |
| 170 * include/pkgconf/mlt_kinetis_flash_sram2s_sram.ldi | |
| 171 * include/pkgconf/mlt_kinetis_flash_unisram_rom.h | |
| 172 * include/pkgconf/mlt_kinetis_flash_unisram_rom.ldi | |
| 173 * include/pkgconf/mlt_kinetis_flash_unisram_sram.h | |
| 174 * include/pkgconf/mlt_kinetis_flash_unisram_sram.ldi | |
| 175 * include/pkgconf/mlt_kinetis_flexnvm_sram2s_rom.h | |
| 176 * include/pkgconf/mlt_kinetis_flexnvm_sram2s_rom.ldi | |
| 177 * include/pkgconf/mlt_kinetis_flexnvm_sram2s_sram.h | |
| 178 * include/pkgconf/mlt_kinetis_flexnvm_sram2s_sram.ldi | |
| 179 * include/pkgconf/mlt_kinetis_flexnvm_unisram_rom.h | |
| 180 * include/pkgconf/mlt_kinetis_flexnvm_unisram_rom.ldi | |
| 181 * include/pkgconf/mlt_kinetis_flexnvm_unisram_sram.h | |
| 182 * include/pkgconf/mlt_kinetis_flexnvm_unisram_sram.ldi | |
| 183 New package -- Freescale Kinetis variant HAL. | |
| 184 | |
| 185 //=========================================================================== | |
| 186 // ####GPLCOPYRIGHTBEGIN#### | |
| 187 // ------------------------------------------- | |
| 188 // This file is part of eCos, the Embedded Configurable Operating System. | |
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189 // Copyright (C) 2011, 2012 Free Software Foundation, Inc. |
| 3056 | 190 // |
| 191 // This program is free software; you can redistribute it and/or modify | |
| 192 // it under the terms of the GNU General Public License as published by | |
| 193 // the Free Software Foundation; either version 2 or (at your option) any | |
| 194 // later version. | |
| 195 // | |
| 196 // This program is distributed in the hope that it will be useful, but | |
| 197 // WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 198 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 199 // General Public License for more details. | |
| 200 // | |
| 201 // You should have received a copy of the GNU General Public License | |
| 202 // along with this program; if not, write to the | |
| 203 // Free Software Foundation, Inc., 51 Franklin Street, | |
| 204 // Fifth Floor, Boston, MA 02110-1301, USA. | |
| 205 // ------------------------------------------- | |
| 206 // ####GPLCOPYRIGHTEND#### | |
| 207 //=========================================================================== |