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annotate packages/hal/arm/arch/current/src/vectors.S @ 150:f0e3fb000de8

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Merge from eCos master repository on 2001-01-26-06:43:02-GMT
author jlarmour
date Fri, 26 Jan 2001 08:15:27 +0000
parents 8f2f7615e727
children 25e238959bae
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1 // #========================================================================
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2 // #
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3 // # vectors.S
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4 // #
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5 // # ARM exception vectors
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6 // #
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7 // #========================================================================
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8 // ####COPYRIGHTBEGIN####
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9 //
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10 // -------------------------------------------
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11 // The contents of this file are subject to the Red Hat eCos Public License
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12 // Version 1.1 (the "License"); you may not use this file except in
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13 // compliance with the License. You may obtain a copy of the License at
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14 // http://www.redhat.com/
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15 //
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16 // Software distributed under the License is distributed on an "AS IS"
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17 // basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the
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18 // License for the specific language governing rights and limitations under
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19 // the License.
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20 //
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21 // The Original Code is eCos - Embedded Configurable Operating System,
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22 // released September 30, 1998.
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23 //
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24 // The Initial Developer of the Original Code is Red Hat.
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25 // Portions created by Red Hat are
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26 // Copyright (C) 1998, 1999, 2000, 2001 Red Hat, Inc.
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27 // All Rights Reserved.
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28 // -------------------------------------------
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29 //
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30 // ####COPYRIGHTEND####
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31 // #========================================================================
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32 // ######DESCRIPTIONBEGIN####
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33 // #
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34 // # Author(s): nickg, gthomas
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35 // # Contributors: nickg, gthomas
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36 // # Date: 1999-02-20
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37 // # Purpose: ARM exception vectors
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38 // # Description: This file defines the code placed into the exception
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39 // # vectors. It also contains the first level default VSRs
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40 // # that save and restore state for both exceptions and
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41 // # interrupts.
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42 // #
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43 // #####DESCRIPTIONEND####
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44 // #
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45 // #========================================================================
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46
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47 #include <pkgconf/hal.h>
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48 #include <pkgconf/hal_arm.h>
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49 #ifdef CYGPKG_KERNEL // no CDL yet
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50 #include <pkgconf/kernel.h>
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51 #else
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52 # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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53 # undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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54 #endif
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55 #include <cyg/hal/hal_platform_setup.h>
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56
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57 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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58 // The CDL should enforce this
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59 #undef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
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60 #endif
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61
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62 #include "arm.inc"
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63
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64 #ifdef __thumb__
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65 // Switch to thumb mode
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66 #define THUMB_MODE(_r_, _l_) \
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67 ldr _r_,=_l_ ## f+1 ;\
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68 bx _r_ ;\
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69 .pool ;\
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70 .code 16 ;\
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71 .thumb_func ;\
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72 _l_:
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73
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74 // Switch to ARM mode
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75 #define ARM_MODE(_r_, _l_) \
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76 ldr _r_,=_l_ ## f ;\
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77 bx _r_ ;\
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78 .pool ;\
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79 .code 32 ;\
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80 _l_:
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81
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82 // Function definition, start executing body in ARM mode
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83 #define FUNC_START_ARM(_name_, _r_) \
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84 .code 16 ;\
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85 .thumb_func ;\
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86 .globl _name_ ;\
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87 _name_: ;\
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88 ldr _r_,=_name_ ## _ARM ;\
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89 bx _r_ ;\
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90 .code 32 ;\
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91 _name_ ## _ARM:
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92
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93 #else
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94
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95 // Switch to thumb mode
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96 #define THUMB_MODE(_r_, _l_)
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97
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98 // Switch to ARM mode
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99 #define ARM_MODE(_r_, _l_)
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100
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101 // Function definition, start executing body in ARM mode
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102 #define FUNC_START_ARM(_name_, _r_) \
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103 .globl _name_; \
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104 _name_:
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105
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106 #endif
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107
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108
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109
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110 #define PTR(name) \
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111 .##name: .word name
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112
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113 #ifdef CYGHWR_HAL_ARM_HAS_MMU
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114 #define UNMAPPED(x) ((x)-__exception_handlers)
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115 #else
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116 #define UNMAPPED(x) (x)
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117 #endif
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118
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119 #define UNMAPPED_PTR(name) \
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120 .##name: .word UNMAPPED(name)
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121
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122
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123 .file "vectors.S"
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124
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125
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126 // CYGHWR_LED_MACRO can be defined in hal_platform_setup.h. It's free to
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127 // use r0+r1. Argument is in "\x" - cannot use macro arguments since the
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128 // macro may contain #-chars and use of arguments cause these to be
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129 // interpreted as CPP stringify operators.
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130 // See example in PID hal_platform_setup.h.
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131 #ifndef CYGHWR_LED_MACRO
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132 #define CYGHWR_LED_MACRO
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133 #endif
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134
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135 .macro LED x
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136 CYGHWR_LED_MACRO
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137 .endm
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138
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139
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140 //==========================================================================
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141 // Hardware exception vectors.
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142 // This entire section will be copied to location 0x0000 at startup time.
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143 //
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144 .code 32
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145 .section ".vectors","ax"
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146 .global __exception_handlers
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147 __exception_handlers:
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148 ldr pc,.reset_vector // 0x00
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149 ldr pc,.undefined_instruction // 0x04
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150 ldr pc,.software_interrupt // 0x08 start && software int
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151 ldr pc,.abort_prefetch // 0x0C
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152 ldr pc,.abort_data // 0x10
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153 .word 0 // unused
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154 ldr pc,.IRQ // 0x18
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155 ldr pc,.FIQ // 0x1C
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156
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157 // The layout of these pointers should match the vector table above since
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158 // they are copied in pairs.
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159 .global vectors
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160 vectors:
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161 UNMAPPED_PTR(reset_vector) // 0x20
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162 PTR(undefined_instruction) // 0x24
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163 PTR(software_interrupt) // 0x28
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164 PTR(abort_prefetch) // 0x2C
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165 PTR(abort_data) // 0x30
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166 .word 0 // 0x34
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167 PTR(IRQ) // 0x38
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168 PTR(FIQ) // 0x3c
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169 PTR(start) // This is copied to 0x28 for bootup // 0x40
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170 // location 0x40 is used for storing DRAM size if known
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171 // for some platforms.
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172
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173 //
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174 // "Vectors" - fixed location data items
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175 // This section contains any data which might be shared between
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176 // an eCos application and any other environment, e.g. the debug
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177 // ROM.
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178 //
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179 .section ".fixed_vectors"
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180 // Interrupt/exception VSR pointers
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181 .globl hal_vsr_table
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182 hal_vsr_table:
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183 .rept 8
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184 .long 0
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185 .endr
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186
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187 .globl hal_dram_size
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188 hal_dram_size:
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189 .long 0
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190 // what, if anything, hal_dram_type means is up to the platform
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191 .globl hal_dram_type
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192 hal_dram_type:
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193 .long 0
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194
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195 .balign 16
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196 #ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
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197 // Vectors used to communicate between eCos and ROM environments
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198 .globl hal_virtual_vector_table
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199 hal_virtual_vector_table:
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200 .rept CYGNUM_CALL_IF_TABLE_SIZE
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201 .long 0
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202 .endr
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203 #endif
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204
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205 .balign 32
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206
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207 // Other vectors - this may include "fixed" locations
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208 #ifdef PLATFORM_VECTORS
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209 PLATFORM_VECTORS
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210 #endif
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211
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212 .text
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213 // Startup code which will get the machine into supervisor mode
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214 .global reset_vector
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215 .type reset_vector,function
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216 reset_vector:
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217 PLATFORM_SETUP1 // Early stage platform initialization
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218 // which can set DRAM size at 0x40
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219 // see <cyg/hal/hal_platform_setup.h>
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220
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221 // Come here to reset board
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222 warm_reset:
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223
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224 #if defined(CYG_HAL_STARTUP_RAM) && \
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225 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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226 mrs r7,cpsr // move back to IRQ mode
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227 and r7,r7,#CPSR_MODE_BITS
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228 cmp r7,#CPSR_SUPERVISOR_MODE
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229 beq start
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230 #endif
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231
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232 // We cannot access any LED registers until after PLATFORM_SETUP1
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233 LED 7
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234
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235 mov r0,#0 // move vectors
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236 ldr r1,=__exception_handlers
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237 #ifndef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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238 // Wait with this if stubs are included (see further down).
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239 ldr r2,[r1,#0x04] // undefined instruction
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240 str r2,[r0,#0x04]
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241 ldr r2,[r1,#0x24]
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242 str r2,[r0,#0x24]
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243 #endif
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244 ldr r2,[r1,#0x08] // software interrupt
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245 str r2,[r0,#0x08]
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246
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247
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248 #if defined(CYG_HAL_STARTUP_RAM)
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249 // Ugly hack to get into supervisor mode
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250 ldr r2,[r1,#0x40]
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251 str r2,[r0,#0x28]
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252
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253 LED 6
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254
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255 swi // switch to supervisor mode
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256 #endif
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257
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258 // =========================================================================
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259 // Real startup code. We jump here from the reset vector to set up the world.
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260 .globl start
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261 start:
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262
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263 LED 5
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264
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265 #if defined(CYG_HAL_STARTUP_RAM) && \
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266 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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267 // If we get restarted, hang here to avoid corrupting memory
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268 ldr r0,.init_flag
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269 ldr r1,[r0]
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270 1: cmp r1,#0
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271 bne 1b
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272 ldr r1,init_done
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273 str r1,[r0]
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274 #endif
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275
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276 // Reset software interrupt pointer
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277 mov r0,#0 // move vectors
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278 ldr r1,.__exception_handlers
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279 #if defined(CYG_HAL_STARTUP_RAM) && \
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280 !defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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281 cmp r7,#CPSR_SUPERVISOR_MODE
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282 beq 10f
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283 #endif
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284 ldr r2,[r1,#0x28] // software interrupt
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285 str r2,[r0,#0x28]
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286 10:
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287 ldr r2,[r1,#0x18] // IRQ
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288 str r2,[r0,#0x18]
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289 ldr r2,[r1,#0x38]
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290 str r2,[r0,#0x38]
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291 ldr r2,[r1,#0x1C] // FIQ
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292 str r2,[r0,#0x1C]
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293 ldr r2,[r1,#0x3C]
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294 str r2,[r0,#0x3C]
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295 ldr r2,[r1,#0x0C] // abort (prefetch)
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296 str r2,[r0,#0x0C]
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297 ldr r2,[r1,#0x2C]
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298 str r2,[r0,#0x2C]
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299 ldr r2,[r1,#0x10] // abort (data)
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300 str r2,[r0,#0x10]
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301 ldr r2,[r1,#0x30]
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302 str r2,[r0,#0x30]
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303
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304 LED 4
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305
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306 #if defined(CYG_HAL_STARTUP_ROM)
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307 // Set up reset vector
132
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308 mov r0,#0
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309 ldr r1,.__exception_handlers
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310 ldr r2,[r1,#0x00] // reset vector intstruction
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311 str r2,[r0,#0x00]
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312 ldr r2,=warm_reset
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313 str r2,[r0,#0x20]
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314 // Relocate [copy] data from ROM to RAM
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315 ldr r3,.__rom_data_start
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316 ldr r4,.__ram_data_start
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317 ldr r5,.__ram_data_end
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318 cmp r4,r5 // jump if no data to move
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319 beq 2f
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320 sub r3,r3,#4 // loop adjustments
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321 sub r4,r4,#4
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322 1: ldr r0,[r3,#4]! // copy info
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323 str r0,[r4,#4]!
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324 cmp r4,r5
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325 bne 1b
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326 2:
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327 #endif
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328
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329 // initialize interrupt/exception environments
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330 ldr sp,.__startup_stack
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331 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_IRQ_MODE)
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332 msr cpsr,r0
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333 ldr sp,.__exception_stack
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334 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_FIQ_MODE)
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335 msr cpsr,r0
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336 ldr sp,.__FIQ_exception_stack
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337 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_UNDEF_MODE)
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338 msr cpsr,r0
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339 ldr sp,.__exception_stack
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340
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341 // initialize CPSR (machine state register)
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342 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
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343 msr cpsr,r0
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344
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345 // Note: some functions in LIBGCC1 will cause a "restore from SPSR"!!
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346 msr spsr,r0
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347
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348 // initialize stack
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349 ldr sp,.__startup_stack
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350
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351 // clear BSS
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352 ldr r1,.__bss_start
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353 ldr r2,.__bss_end
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354 mov r0,#0
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355 cmp r1,r2
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356 beq 2f
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357 1: str r0,[r1],#4
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358 cmp r1,r2
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359 bne 1b
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360 2:
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361
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362 // Run kernel + application in THUMB mode
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363 THUMB_MODE(r1,10)
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364
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365 LED 3
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366
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367 // Call platform specific hardware initialization
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368 bl hal_hardware_init
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369
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370 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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371 bl initialize_stub
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372
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373 // Now that stub is initialized, change vector. It is possible
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374 // to single-step through most of the init code, except the below.
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375 // Put a breakpoint at the call to cyg_hal_invoke_constructors to
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376 // pass over this bit (s-s depends on internal state in the stub).
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377 #endif
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378
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379 #if defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS) || \
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380 defined(CYGIMP_HAL_PROCESS_ALL_EXCEPTIONS)
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381 mov r0,#0 // move vectors
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382 ldr r1,=__exception_handlers
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383 ldr r2,[r1,#0x04] // undefined instruction
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384 str r2,[r0,#0x04]
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385 ldr r2,[r1,#0x24]
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386 str r2,[r0,#0x24]
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387 #endif
112
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388
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389 // FIXME: The line with the thumb check is a hack, allowing
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390 // the farm to run test. Problem is that virtual vector table
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391 // API needs to be ARM/Thumb consistent. Will fix later.
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392 #if !defined(__thumb__) || defined(CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS)
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393 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
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394 || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
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395 .extern hal_ctrlc_isr_init
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396 bl hal_ctrlc_isr_init
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397 #endif
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398 #endif
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399 LED 2
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400
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401 // Run through static constructors
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402 bl cyg_hal_invoke_constructors
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403
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404 LED 1
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405
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406 // This starts up the eCos kernel
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407 bl cyg_start
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408 _start_hang:
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409 b _start_hang
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410 .code 32
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411
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412 .global reset_platform
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413 .type reset_platform,function
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414 reset_platform:
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415 #ifdef CYGSEM_HAL_ROM_MONITOR
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416 // initialize CPSR (machine state register)
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417 mov r0,#(CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
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418 msr cpsr,r0
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419 b warm_reset
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420 #else
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421 mov r0,#0
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422 mov pc,r0 // Jump to reset vector
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423 #endif
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424
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425 init_done:
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426 .long 0xDEADB00B
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427
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428 //
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429 // Exception handlers
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430 // Assumption: get here from a Supervisor context [mode]
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431 //
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432 .code 32
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433 undefined_instruction:
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434 ldr sp,.__undef_exception_stack // get good stack
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435 stmfd sp!,{r0,fp,ip,lr}
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436 mrs r0,spsr
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437 stmfd sp!,{r0}
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438 mov ip,sp // save SP which will vanish with
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439 // mode switch
80
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440 mrs r0,cpsr // switch to Supervisor Mode
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441 bic r0,r0,#CPSR_MODE_BITS
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442 orr r0,r0,#CPSR_SUPERVISOR_MODE
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diff changeset
443 msr cpsr,r0 // sp,lr are now old values
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
444 mov fp,sp
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
445 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
446 ldr sp,.__GDB_stack
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
447 cmp fp,sp // already on GDB stack?
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
448 bhi 10f
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
449 ldr r0,.__GDB_stack_base
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
450 cmp fp,r0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
451 bls 10f // no - switch to GDB stack
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
452 // (already in sp)
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
453 mov sp,fp // yes - no switch
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
454 10:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
455 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
456 sub sp,sp,#ARMREG_SIZE // make space for frame
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
457 stmea sp,{r0-r10,fp} // save immediately visible registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
458 ldmfd ip,{r0-r4} // saved registers
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
459 // Adjust PC according to CPU mode
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
460 tst r0,#CPSR_THUMB_ENABLE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
461 subeq r4,r4,#4 // PC at time of interrupt (ARM)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
462 subne r4,r4,#2 // PC at time of interrupt (thumb)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
463 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
464 str r1,[sp,#armreg_r0] // saved R0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
465 str r2,[sp,#armreg_fp] // saved FP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
466 str r3,[sp,#armreg_ip] // saved IP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
467 str r4,[sp,#armreg_pc] // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
468 str lr,[sp,#armreg_lr] // LR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
469 add r0,ip,#ARMREG_SIZE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
470 str fp,[sp,#armreg_sp] // SP at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
471 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
472 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
473 bl cyg_hal_report_undefined_instruction
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
474 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
475 mov v1,#CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
476 b call_exception_handler
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
477
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
478 .code 32
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
479 software_interrupt:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
480 sub sp,sp,#ARMREG_SIZE+16 // make space for frame
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
481 stmea sp,{r0-r10,fp} // save immediately visible registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
482 mrs r0,spsr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
483 // Adjust PC according to CPU mode
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
484 tst r0,#CPSR_THUMB_ENABLE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
485 subeq r3,lr,#4 // PC at time of interrupt (ARM)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
486 subne r3,lr,#2 // PC at time of interrupt (thumb)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
487 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
488 str ip,[sp,#armreg_ip] // saved IP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
489 str r3,[sp,#armreg_pc] // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
490 str lr,[sp,#armreg_lr] // LR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
491 add r0,sp,#ARMREG_SIZE+16
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
492 str r0,[sp,#armreg_sp] // SP at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
493 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
494 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
495 bl cyg_hal_report_software_interrupt
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
496 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
497 mov v1,#CYGNUM_HAL_EXCEPTION_INTERRUPT
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
498 b call_exception_handler
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
499
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
500 .code 32
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
501 abort_prefetch:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
502 ldr sp,.__undef_exception_stack // get good stack
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
503 sub lr,lr,#4 // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
504 stmfd sp!,{r0,fp,ip,lr}
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
505 mrs r0,spsr
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
506 stmfd sp!,{r0}
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
507 mov ip,sp // save SP which will vanish with
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
508 // mode switch
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
509 mrs r0,cpsr // switch to Supervisor Mode
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
510 bic r0,r0,#CPSR_MODE_BITS
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
511 orr r0,r0,#CPSR_SUPERVISOR_MODE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
512 msr cpsr,r0 // sp,lr are now old values
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
513 mov fp,sp
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
514 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
515 ldr sp,.__GDB_stack
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
516 cmp fp,sp // already on GDB stack?
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
517 bhi 10f
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
518 ldr r0,.__GDB_stack_base
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
519 cmp fp,r0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
520 bls 10f // no - switch to GDB stack
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
521 // (already in sp)
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
522 mov sp,fp // yes - no switch
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
523 10:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
524 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
525 sub sp,sp,#ARMREG_SIZE // make space for frame
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
526 stmea sp,{r0-r10,fp} // save immediately visible registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
527 ldmfd ip,{r0-r4} // saved registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
528 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
529 str r1,[sp,#armreg_r0] // saved R0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
530 str r2,[sp,#armreg_fp] // saved FP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
531 str r3,[sp,#armreg_ip] // saved IP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
532 str r4,[sp,#armreg_pc] // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
533 str lr,[sp,#armreg_lr] // LR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
534 add r0,ip,#ARMREG_SIZE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
535 str fp,[sp,#armreg_sp] // SP at time of interrupt
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
536 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
537 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
538 bl cyg_hal_report_abort_prefetch
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
539 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
540 mov v1,#CYGNUM_HAL_EXCEPTION_CODE_ACCESS
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
541 b call_exception_handler
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
542
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
543 .code 32
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
544 abort_data:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
545 ldr sp,.__undef_exception_stack // get good stack
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
546 sub lr,lr,#4 // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
547 stmfd sp!,{r0,fp,ip,lr}
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
548 mrs r0,spsr
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
549 stmfd sp!,{r0}
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
550 mov ip,sp // save SP which will vanish with
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
551 // mode switch
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
552 mrs r0,cpsr // switch to Supervisor Mode
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
553 bic r0,r0,#CPSR_MODE_BITS
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
554 orr r0,r0,#CPSR_SUPERVISOR_MODE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
555 msr cpsr,r0 // sp,lr are now old values
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
556 mov fp,sp
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
557 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
558 ldr sp,.__GDB_stack
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
559 cmp fp,sp // already on GDB stack?
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
560 bhi 10f
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
561 ldr r0,.__GDB_stack_base
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
562 cmp fp,r0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
563 bls 10f // no - switch to GDB stack
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
564 // (already in sp)
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
565 mov sp,fp // yes - no switch
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
566 10:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
567 #endif
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
568 sub sp,sp,#ARMREG_SIZE // make space for frame
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
569 stmea sp,{r0-r10,fp} // save immediately visible registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
570 ldmfd ip,{r0-r4} // saved registers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
571 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
572 str r1,[sp,#armreg_r0] // saved R0
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
573 str r2,[sp,#armreg_fp] // saved FP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
574 str r3,[sp,#armreg_ip] // saved IP
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
575 str r4,[sp,#armreg_pc] // PC at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
576 str lr,[sp,#armreg_lr] // LR at time of interrupt
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
577 add r0,ip,#ARMREG_SIZE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
578 str fp,[sp,#armreg_sp] // SP at time of interrupt
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
579 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
580 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
581 bl cyg_hal_report_abort_data
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
582 #endif
80
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583 mov v1,#CYGNUM_HAL_EXCEPTION_DATA_ACCESS
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diff changeset
584 b call_exception_handler
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585
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586
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587 //
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588 // Dispatch an exception handler.
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589
80
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590 .code 32
2
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591 call_exception_handler:
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592 str v1,[sp,#armreg_vector]
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593 mov r0,sp
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diff changeset
594
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diff changeset
595 THUMB_MODE(r9,10)
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596
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diff changeset
597 bl exception_handler
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598 #ifdef CYGHWR_HAL_ARM_DUMP_EXCEPTIONS
80
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599 mov r0,sp
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600 bl cyg_hal_report_exception_handler_returned
76
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601 #endif
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602
80
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diff changeset
603 ARM_MODE(r1,10)
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604
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diff changeset
605 // Restore [interrupted] context
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diff changeset
606 mov ip,sp // get stack pointer
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diff changeset
607
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diff changeset
608 mrs r0,cpsr // move back to IRQ mode
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diff changeset
609 orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
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diff changeset
610 msr cpsr,r0
38
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diff changeset
611 nop
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diff changeset
612 nop
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diff changeset
613
80
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diff changeset
614 ldr lr,[ip,#armreg_lr]
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diff changeset
615 ldr sp,[sp,#armreg_sp]
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diff changeset
616
80
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diff changeset
617 bic r0,r0,#CPSR_MODE_BITS
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diff changeset
618 orr r0,r0,#CPSR_IRQ_MODE
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diff changeset
619 msr cpsr,r0
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620
80
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621 mov sp,ip
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622 ldr lr,[sp,#armreg_pc]
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623 ldr r0,[sp,#armreg_cpsr]
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624 ldr ip,[sp,#armreg_ip]
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diff changeset
625 msr spsr,r0
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diff changeset
626 ldmfd sp,{r0-r10,fp}
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627
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628 movs pc,lr // restore PC from LR, CPSR from SPSR
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629
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630 // Handle device interrupts
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631 // This is slightly more complicated than the other exception handlers because
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632 // it needs to interface with the kernel (if present).
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633
80
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634 .code 32
20
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diff changeset
635 FIQ:
80
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diff changeset
636 // Note: I use this exception stack while saving the context because
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diff changeset
637 // the current SP does not seem to be always valid in this CPU mode.
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diff changeset
638 ldr sp,.__FIQ_exception_stack // get good stack
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diff changeset
639 sub lr,lr,#4 // PC at time of interrupt
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diff changeset
640 stmfd sp!,{r0,fp,ip,lr}
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diff changeset
641 mrs r0,spsr
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642 stmfd sp!,{r0}
20
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643 b handle_IRQ_or_FIQ
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644
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645 IRQ:
80
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646 // Note: I use this exception stack while saving the context because
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647 // the current SP does not seem to be always valid in this CPU mode.
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diff changeset
648 ldr sp,.__exception_stack // get good stack
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diff changeset
649 sub lr,lr,#4 // PC at time of interrupt
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diff changeset
650 stmfd sp!,{r0,fp,ip,lr}
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diff changeset
651 mrs r0,spsr
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652 stmfd sp!,{r0}
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653
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diff changeset
654 handle_IRQ_or_FIQ:
80
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655 mov ip,sp // save SP which will vanish with
2
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656 // mode switch
80
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diff changeset
657 mrs r0,cpsr // switch to Supervisor Mode
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658 bic r0,r0,#CPSR_MODE_BITS
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diff changeset
659 orr r0,r0,#CPSR_SUPERVISOR_MODE|CPSR_FIQ_DISABLE|CPSR_IRQ_DISABLE
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660 msr cpsr,r0 // sp,lr are now old values
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661 mov fp,sp // save old SP
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662 sub sp,sp,#ARMREG_SIZE // make space for frame
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663 stmea sp,{r0-r10,fp} // save immediately visible registers
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664 ldmfd ip,{r0-r4} // saved registers
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665 str r0,[sp,#armreg_cpsr] // CPSR at time of interrupt
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666 str r1,[sp,#armreg_r0] // saved R0
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667 str r2,[sp,#armreg_fp] // saved FP
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668 str r3,[sp,#armreg_ip] // saved IP
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669 str r4,[sp,#armreg_pc] // PC at time of interrupt
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670 str lr,[sp,#armreg_lr] // LR at time of interrupt
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671 str fp,[sp,#armreg_sp] // SP at time of interrupt
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672 mov v6,sp // Save pointer to register frame
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673
80
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674 // mov r0,sp
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675 // bl _show_frame_in
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676
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677 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
80
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678 // Switch to interrupt stack
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diff changeset
679 ldr r2,.irq_level // current number of nested interrupts
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680 ldr r0,[r2]
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681 add r1,r0,#1
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682 str r1,[r2] // if was zero, switch stacks
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683 cmp r0,#0
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684 moveq r1,sp // save old stack pointer
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diff changeset
685 ldreq sp,.__interrupt_stack
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686 stmeqfd sp!,{r1}
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687 10:
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688 #endif
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689
80
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690 // The entire CPU state is now stashed on the stack,
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diff changeset
691 // increment the scheduler lock and handle the interrupt
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692
80
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693 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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694 .extern cyg_scheduler_sched_lock
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695 ldr r3,.cyg_scheduler_sched_lock
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diff changeset
696 ldr r4,[r3]
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697 add r4,r4,#1
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diff changeset
698 str r4,[r3]
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699 #endif
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700
80
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diff changeset
701 THUMB_MODE(r3,10)
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702
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703 mov r0,v6
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704 bl hal_IRQ_handler // determine interrupt source
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705 mov v1,r0 // returned vector #
2
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706
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707 #if defined(CYGPKG_KERNEL_INSTRUMENT) && \
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708 defined(CYGDBG_KERNEL_INSTRUMENT_INTR)
80
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709 ldr r0,=RAISE_INTR // arg0 = type = INTR,RAISE
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710 mov r1,v1 // arg1 = vector
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711 mov r2,#0 // arg2 = 0
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712 bl cyg_instrument // call instrument function
2
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713 #endif
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714
80
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diff changeset
715 ARM_MODE(r0,10)
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diff changeset
716
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717 mov r0,v1 // vector #
103
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718
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719 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
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720 || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
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721 // If we are supporting Ctrl-C interrupts from GDB, we must squirrel
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722 // away a pointer to the save interrupt state here so that we can
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diff changeset
723 // plant a breakpoint at some later time.
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diff changeset
724
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725 .extern hal_saved_interrupt_state
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726 ldr r2,=hal_saved_interrupt_state
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727 str v6,[r2]
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diff changeset
728 #endif
95f3e12a6327 Merge from eCos master repository on 2000-06-23-16:41:10-BST
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parents: 96
diff changeset
729
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
730 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
38
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents: 36
diff changeset
731 cmp r0,#0 // ignore spurious interrupts
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents: 36
diff changeset
732 beq spurious_IRQ
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents: 36
diff changeset
733 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
734 ldr r1,.hal_interrupt_data
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
735 ldr r1,[r1,v1,lsl #2] // handler data
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
736 ldr r2,.hal_interrupt_handlers
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
737 ldr v3,[r2,v1,lsl #2] // handler (indexed by vector #)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
738 mov r2,v6 // register frame (this is necessary
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
739 // for the ISR too, for ^C detection)
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
740
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
741 #ifdef __thumb__
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
742 ldr lr,=10f
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
743 bx v3 // invoke handler (thumb mode)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
744 .pool
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
745 .code 16
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parents: 76
diff changeset
746 .thumb_func
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
747 IRQ_10T:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
748 10: ldr r2,=15f
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
749 bx r2 // switch back to ARM mode
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
750 .pool
80
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parents: 76
diff changeset
751 .code 32
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
752 15:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
753 IRQ_15A:
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents: 70
diff changeset
754 #else
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
755 mov lr,pc // invoke handler (call indirect
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parents: 76
diff changeset
756 mov pc,v3 // thru v3)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents: 70
diff changeset
757 #endif
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
758
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
759 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
38
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
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parents: 36
diff changeset
760 spurious_IRQ:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
761 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_IGNORE_SPURIOUS
38
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
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parents: 36
diff changeset
762
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
763 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
764 // If we are returning from the last nested interrupt, move back
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parents: 76
diff changeset
765 // to the thread stack. interrupt_end() must be called on the
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
766 // thread stack since it potentially causes a context switch.
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jlarmour
parents: 76
diff changeset
767 ldr r2,.irq_level
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jlarmour
parents: 76
diff changeset
768 ldr r3,[r2]
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jlarmour
parents: 76
diff changeset
769 subs r1,r3,#1
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jlarmour
parents: 76
diff changeset
770 str r1,[r2]
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
771 ldreq sp,[sp] // This should be the saved stack pointer
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
772 #endif
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
773 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
774 // The return value from the handler (in r0) will indicate whether a
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
775 // DSR is to be posted. Pass this together with a pointer to the
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
776 // interrupt object we have just used to the interrupt tidy up routine.
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
777
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
778 ldr r1,.hal_interrupt_objects
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
779 ldr r1,[r1,v1,lsl #2]
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
780 mov r2,v6 // register frame
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jlarmour
parents: 76
diff changeset
781
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
782 THUMB_MODE(r3,10)
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jlarmour
parents: 76
diff changeset
783
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
784 bl interrupt_end // post any bottom layer handler
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
785 // threads and call scheduler
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
786 #endif
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
787
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
788 ARM_MODE(r1,10)
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jlarmour
parents: 76
diff changeset
789
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jlarmour
parents: 76
diff changeset
790 // mov r0,sp
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jlarmour
parents: 76
diff changeset
791 // bl show_frame_out
10
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents: 8
diff changeset
792
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
793 mov ip,sp // get stack pointer
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
794
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
795 mrs r0,cpsr // move back to IRQ mode
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jlarmour
parents: 76
diff changeset
796 orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
797 msr cpsr,r0
38
e7ba79f6d3a8 Merge from eCos master repository on 1999-09-23-20:10:25-BST
jlarmour
parents: 36
diff changeset
798 nop
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jlarmour
parents: 36
diff changeset
799 nop
50
a0774359f013 Merge from eCos master repository on 1999-11-02-17:02:15-GMT
jlarmour
parents: 46
diff changeset
800
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
801 ldr lr,[ip,#armreg_lr]
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
802 ldr sp,[sp,#armreg_sp]
50
a0774359f013 Merge from eCos master repository on 1999-11-02-17:02:15-GMT
jlarmour
parents: 46
diff changeset
803
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
804 bic r0,r0,#CPSR_MODE_BITS
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jlarmour
parents: 76
diff changeset
805 orr r0,r0,#CPSR_IRQ_MODE
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
806 msr cpsr,r0
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
807
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
808 mov sp,ip
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jlarmour
parents: 76
diff changeset
809 ldr lr,[sp,#armreg_pc]
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jlarmour
parents: 76
diff changeset
810 ldr r0,[sp,#armreg_cpsr]
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
811 ldr ip,[sp,#armreg_ip]
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jlarmour
parents: 76
diff changeset
812 msr spsr,r0
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jlarmour
parents: 76
diff changeset
813 ldmfd sp,{r0-r10,fp}
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
814 movs pc,lr // restore PC from LR, CPSR from SPSR
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
815
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
816 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
817 // Execute pending DSRs the interrupt stack
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
818 // Note: this can only be called from code running on a thread stack
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
819 FUNC_START_ARM(hal_interrupt_stack_call_pending_DSRs, r1)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
820 stmfd sp!,{r4,r5,lr}
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parents: 76
diff changeset
821 // Disable interrupts
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parents: 76
diff changeset
822 mrs r4,cpsr // disable IRQ's
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parents: 76
diff changeset
823 orr r2,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
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jlarmour
parents: 76
diff changeset
824 bic r5,r4,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
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jlarmour
parents: 76
diff changeset
825 msr cpsr,r2
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jlarmour
parents: 76
diff changeset
826 // Switch to interrupt stack
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jlarmour
parents: 76
diff changeset
827 mov r3,sp // save old stack pointer
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jlarmour
parents: 76
diff changeset
828 ldr sp,.__interrupt_stack
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parents: 76
diff changeset
829 stmfd sp!,{r3} // stored at top of interrupt stack
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jlarmour
parents: 76
diff changeset
830 ldr r2,.irq_level // current number of nested interrupts
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jlarmour
parents: 76
diff changeset
831 ldr r3,[r2]
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jlarmour
parents: 76
diff changeset
832 add r3,r3,#1 // bump nesting level
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jlarmour
parents: 76
diff changeset
833 str r3,[r2]
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parents: 76
diff changeset
834 msr cpsr,r5 // enable interrupts
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parents: 76
diff changeset
835
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diff changeset
836 THUMB_MODE(r1,20)
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parents: 76
diff changeset
837
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jlarmour
parents: 76
diff changeset
838 bl cyg_interrupt_call_pending_DSRs
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jlarmour
parents: 76
diff changeset
839
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parents: 76
diff changeset
840
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jlarmour
parents: 76
diff changeset
841 ARM_MODE(r1,22)
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diff changeset
842
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diff changeset
843 // Disable interrupts
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diff changeset
844 mrs r1,cpsr // disable IRQ's
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parents: 76
diff changeset
845 orr r2,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
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jlarmour
parents: 76
diff changeset
846 msr cpsr,r2
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jlarmour
parents: 76
diff changeset
847
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jlarmour
parents: 76
diff changeset
848 // Move back to the thread stack.
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parents: 76
diff changeset
849 ldr r2,.irq_level
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parents: 76
diff changeset
850 ldr r3,[r2]
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parents: 76
diff changeset
851 sub r3,r3,#1 // decrement nesting level
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jlarmour
parents: 76
diff changeset
852 str r3,[r2]
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parents: 76
diff changeset
853 ldr sp,[sp] // This should be the saved stack pointer
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parents: 76
diff changeset
854 msr cpsr,r4 // restore interrupts to original state
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
855
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents: 70
diff changeset
856 #ifdef __thumb__
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
857 ldmfd sp!,{r4,r5,lr} // return
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jlarmour
parents: 76
diff changeset
858 bx lr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
859 #else
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
860 ldmfd sp!,{r4,r5,pc} // return
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents: 70
diff changeset
861 #endif // __thumb__
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
862 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
14
01ce82f3e11a Merge from eCos master repository on 1999-06-11-17:05:41-BST
jlarmour
parents: 10
diff changeset
863
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
864 // Thumb-only support functions
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
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parents: 70
diff changeset
865 #ifdef __thumb__
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
866
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
867 FUNC_START_ARM(hal_disable_interrupts, r1)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
868 mrs r0,cpsr // current state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
869 orr r1,r0,#0xC0 // mask both FIQ and IRQ
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
870 msr cpsr,r1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
871 bx lr // exit, _old_ in r0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
872
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
873 FUNC_START_ARM(hal_enable_interrupts, r1)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
874 mrs r0,cpsr // current state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
875 bic r1,r0,#0xC0 // mask both FIQ and IRQ
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
876 msr cpsr,r1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
877 bx lr // exit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
878
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
879 FUNC_START_ARM(hal_restore_interrupts, r1)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
880 mrs r1,cpsr // current state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
881 bic r1,r1,#0xC0 // mask out FIQ/IRQ bits
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
882 and r0,r0,#0xC0 // keep only FIQ/IRQ
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
883 orr r1,r1,r0 // mask both FIQ and IRQ
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
884 msr cpsr,r1
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
885 bx lr // exit
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
886
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
887 FUNC_START_ARM(hal_query_interrupts, r1)
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
888 mrs r0,cpsr // current state
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
889 bx lr // exit, state in r0
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
890
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
891 #endif // __thumb__
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
892
34
29bc183297e1 Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents: 28
diff changeset
893 // Dummy/support functions
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
894
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
895 .global __gccmain
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
896 .global _psr
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
897 .global _sp
34
29bc183297e1 Merge from eCos master repository on 1999-09-02-16:26:10-BST
jlarmour
parents: 28
diff changeset
898
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
899 #ifdef __thumb__
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
900 .code 16
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
901 .thumb_func
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
902 __gccmain:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
903 bx lr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
904
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
905 .code 16
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
906 .thumb_func
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
907 _psr:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
908 ARM_MODE(r1,10)
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
909 mrs r0,cpsr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
910 bx lr
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
911
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
912 .code 16
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
913 .thumb_func
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
914 _sp:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
915 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
916 bx lr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
917 #else
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
918 __gccmain:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
919 mov pc,lr
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
920
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
921 _psr:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
922 mrs r0,cpsr
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
923 mov pc,lr
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
924
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
925 _sp:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
926 mov r0,sp
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
927 mov pc,lr
76
435cced73e2f eCos v1.3.1 merged from eCos master repository on 2000-03-27-23:22:51-BST
jlarmour
parents: 70
diff changeset
928 #endif
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
929
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
930
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
931 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
932 // Pointers to various objects.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
933 //
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
934 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
935 PTR(__GDB_stack_base)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
936 PTR(__GDB_stack)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
937 #endif
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
938 PTR(__startup_stack)
20
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents: 16
diff changeset
939 PTR(__FIQ_exception_stack)
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
940 PTR(__exception_stack)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
941 PTR(__undef_exception_stack)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
942 PTR(__bss_start)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
943 PTR(__bss_end)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
944 PTR(_end)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
945 PTR(__rom_data_start)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
946 PTR(__ram_data_start)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
947 PTR(__ram_data_end)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
948 PTR(hal_interrupt_handlers)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
949 PTR(hal_interrupt_data)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
950 PTR(hal_interrupt_objects)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
951 PTR(__exception_handlers)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
952 PTR(init_flag)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
953 #ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
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jlarmour
parents:
diff changeset
954 PTR(cyg_scheduler_sched_lock)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
955 #endif
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
956 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
957 PTR(irq_level)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
958 PTR(__interrupt_stack)
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
959 #endif
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
960
10
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents: 8
diff changeset
961 //
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents: 8
diff changeset
962 // Identification - useful to find out when a system was configured
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents: 8
diff changeset
963 _eCos_id:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
964 .asciz "eCos : " __DATE__
10
d3fbcdfa1b2f Merge from eCos master repository on 1999-05-29-00:13:11-BST
jlarmour
parents: 8
diff changeset
965
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
966
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
967 // -------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
968 // Interrupt vector tables.
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
969 // These tables contain the isr, data and object pointers used to deliver
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
970 // interrupts to user code.
24
306eee292492 Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents: 20
diff changeset
971
306eee292492 Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents: 20
diff changeset
972 // Despite appearances, their sizes are not #defines, but .equ symbols
306eee292492 Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents: 20
diff changeset
973 // generated by magic without proper dependencies in arm.inc
306eee292492 Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents: 20
diff changeset
974 // Recompiling will not DTRT without manual intervention.
306eee292492 Merge from eCos master repository on 1999-07-16-05:47:06-BST
jlarmour
parents: 20
diff changeset
975
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
976 .data
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
977
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
978 init_flag:
150
f0e3fb000de8 Merge from eCos master repository on 2001-01-26-06:43:02-GMT
jlarmour
parents: 148
diff changeset
979 .balign 4
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
980 .long 0
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
981
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
982 .extern hal_default_isr
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
983
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
984 .globl hal_interrupt_handlers
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
985 hal_interrupt_handlers:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
986 .rept CYGNUM_HAL_ISR_COUNT
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jlarmour
parents: 76
diff changeset
987 .long hal_default_isr
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parents: 76
diff changeset
988 .endr
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
989
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
990 .globl hal_interrupt_data
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
991 hal_interrupt_data:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
992 .rept CYGNUM_HAL_ISR_COUNT
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parents: 76
diff changeset
993 .long 0
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parents: 76
diff changeset
994 .endr
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
995
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
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parents: 76
diff changeset
996 .globl hal_interrupt_objects
2
443894e2e912 Block commit of eCos version 1.2.1
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parents:
diff changeset
997 hal_interrupt_objects:
80
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
998 .rept CYGNUM_HAL_ISR_COUNT
2085233a121a Merge from eCos master repository on 2000-04-07-07:52:29-BST
jlarmour
parents: 76
diff changeset
999 .long 0
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parents: 76
diff changeset
1000 .endr
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1001
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1002 // -------------------------------------------------------------------------
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1003 // Temporary interrupt stack
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1004
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1005 .section ".bss"
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1006
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1007 // Small stacks, only used for saving information between CPU modes
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1008 __exception_stack_base:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1009 .rept 32
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1010 .long 0
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1011 .endr
20
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents: 16
diff changeset
1012 __FIQ_exception_stack:
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents: 16
diff changeset
1013 .rept 32
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents: 16
diff changeset
1014 .long 0
5f5102441818 Merge from eCos master repository on 1999-07-02-23:17:07-BST
jlarmour
parents: 16
diff changeset
1015 .endr
2
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1016 __exception_stack:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1017 .rept 32
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1018 .long 0
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1019 .endr
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1020 __undef_exception_stack:
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1021
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1022 // Runtime stack used during all interrupt processing
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
parents:
diff changeset
1023 #ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
443894e2e912 Block commit of eCos version 1.2.1
jlarmour
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1024 #define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096
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1025 #endif
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1026 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
80
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1027 .balign 16
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1028 .global cyg_interrupt_stack_base
8
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1029 cyg_interrupt_stack_base:
2
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1030 __interrupt_stack_base:
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1031 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
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1032 .byte 0
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1033 .endr
80
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1034 .balign 16
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1035 .global cyg_interrupt_stack
8
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1036 cyg_interrupt_stack:
2
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1037 __interrupt_stack:
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1038 irq_level:
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1039 .long 0
2
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1040 #endif
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1041
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1042 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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1043 .balign 16
2
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1044 __GDB_stack_base:
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1045 .rept 0x400
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1046 .byte 0
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1047 .endr
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1048 __GDB_stack:
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1049 #endif
80
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1050 .balign 16
2
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1051 __startup_stack_base:
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1052 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
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1053 .rept 512
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1054 #else
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1055 .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
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1056 #endif
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1057 .byte 0
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1058 .endr
80
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1059 .balign 16
2
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1060 __startup_stack:
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1061
56
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1062 #ifdef PLATFORM_EXTRAS
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1063 #include PLATFORM_EXTRAS
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1064 #endif
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1065
2
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1066 // --------------------------------------------------------------------------
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1067 // end of vectors.S